Search Results - "Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324)"

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  1. 21
    Battery-conscious task sequencing for portable devices including voltage/clock scaling

    Battery-conscious task sequencing for portable devices including voltage/clock scaling by Rakhmatov, D., Vrudhula, S., Chakrabarti, C.

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  2. 22
    Scheduler-based DRAM energy management

    Scheduler-based DRAM energy management by Delaluz, V., Sivasubramaniam, A., Kandemir, M., Vijaykrishnan, N., Irwin, M.J.

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  3. 23
    Hole analysis for functional coverage data

    Hole analysis for functional coverage data by Lachish, O., Marcus, E., Ur, S., Ziv, A.

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  4. 24
    Energy estimation and optimization of embedded VLIW processors based on instruction clustering

    Energy estimation and optimization of embedded VLIW processors based on instruction clustering by Bona, A., Sami, M., Sciuto, D., Silvano, C., Zaccaria, V., Zafalon, R.

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  5. 25
    Automatic data migration for reducing energy consumption in multi-bank memory systems

    Automatic data migration for reducing energy consumption in multi-bank memory systems by De La Luz, V., Kandemir, M., Kolcu, I.

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  6. 26
    Using embedded FPGAs for SoC yield improvement

    Using embedded FPGAs for SoC yield improvement by Abramovici, M., Stroud, C., Emmert, M.

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  7. 27
    RTL C-based methodology for designing and verifying a multi-threaded processor

    RTL C-based methodology for designing and verifying a multi-threaded processor by Semeria, L., Seawright, A., Mehra, R., Ng, D., Ekanayake, A., Pangrle, B.

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  8. 28
    Coping with buffer delay change due to power and ground noise

    Coping with buffer delay change due to power and ground noise by Chen, L.H., Marek-Sadowska, M., Brewer, F.

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  9. 29
    Component-based design approach for multicore SoCs

    Component-based design approach for multicore SoCs by Cescirio, W., Baghdadi, A., Gauthier, L., Lyonnard, D., Nicolescu, G., Paviot, Y., Yoo, S., Jerraya, A.A., Diaz-Nava, M.

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  10. 30
    Solving difficult SAT instances in the presence of symmetry

    Solving difficult SAT instances in the presence of symmetry by Aloul, F.A., Ramani, A., Markov, I.L., Sakallah, K.A.

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  11. 31
    A practical and efficient method for compare-point matching

    A practical and efficient method for compare-point matching by Anastasakis, D., Damiano, R., Ma, H.-K.T., Stanion, T.

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  12. 32
    A comparison of three verification techniques: directed testing, pseudo-random testing and property checking

    A comparison of three verification techniques: directed testing, pseudo-random testing and property checking by Bartley, M.G., Galpin, D., Blackmore, T.

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  13. 33
    Fast and accurate behavioral simulation of fractional-N frequency synthesizers and other PLL/DLL circuits

    Fast and accurate behavioral simulation of fractional-N frequency synthesizers and other PLL/DLL circuits by Perrott, M.H.

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  14. 34
    Life is CMOS: why chase the life after?

    Life is CMOS: why chase the life after? by Sery, G., Borkar, S., De, V.

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  15. 35
    Unlocking the design secrets of a 2.29 Gb/s Rijndael processor

    Unlocking the design secrets of a 2.29 Gb/s Rijndael processor by Schaumont, P.R., Kuo, H., Verbauwhede, I.M.

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  16. 36
    Automatic generation of embedded memory wrapper for multiprocessor SoC

    Automatic generation of embedded memory wrapper for multiprocessor SoC by Gharsalli, F., Meftali, S., Rousseau, F., Jerraya, A.A.

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  17. 37
    A hybrid verification approach: Getting deep into the design

    A hybrid verification approach: Getting deep into the design by Hazelhurst, S., Kamhi, G., Weissberg, O., Fix, L.

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  18. 38
    A novel wavelet transform based transient current analysis for fault detection and localization

    A novel wavelet transform based transient current analysis for fault detection and localization by Bhunia, S., Roy, K., Segura, J.

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  19. 39
    HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery

    HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery by Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Chen, C.C.-P.

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  20. 40
    Automated timing model generation

    Automated timing model generation by Daga, A.J., Mize, L., Sripada, S., Wolff, C., Qiuyang Wu

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