Search Results - AXELRAD, V

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  1. 1
    Grid quality and its influence on accuracy and convergence in device simulation

    Grid quality and its influence on accuracy and convergence in device simulation by Axelrad, V.

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  2. 2
    The Impact of CMOS technology scaling on MOSFETs second breakdown: Evaluation of ESD robustness

    The Impact of CMOS technology scaling on MOSFETs second breakdown: Evaluation of ESD robustness by SEMENOV, O, SARBISHAEI, H, AXELRAD, V, SACHDEV, M

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  3. 3
    Intracell Capacitances in Pixel-level Hybrid Bond Image Sensor Cells

    Intracell Capacitances in Pixel-level Hybrid Bond Image Sensor Cells by Axelrad, V., Milic, O.

    Published in Electronic Imaging
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  4. 4
    Implementation of ESD Protection in SOI Technology: A Simulation Study

    Implementation of ESD Protection in SOI Technology: A Simulation Study by Axelrad, V., Shibkov, A., Hayashi, H., Fukuda, K.

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  5. 5
    Fourier method modeling of semiconductor devices

    Fourier method modeling of semiconductor devices by Axelrad, V.

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  6. 6
    Physical circuit-device simulation of ESD and power devices

    Physical circuit-device simulation of ESD and power devices by Axelrad, V., Hayashi, H., Kurachi, I.

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  7. 7
    Simulation-Based Lithography Optimization for Logic Circuits at 22nm and Below

    Simulation-Based Lithography Optimization for Logic Circuits at 22nm and Below by Smayling, M.C., Axelrad, V.

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  8. 8
    Integrated Simulation Flow for Self-Consistent Manufacturability and Circuit Performance Evaluation

    Integrated Simulation Flow for Self-Consistent Manufacturability and Circuit Performance Evaluation by Shibkov, A., Axelrad, V.

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  9. 9
    Carrier temperature dependent gate current modeling for EEPROM simulation

    Carrier temperature dependent gate current modeling for EEPROM simulation by Rollins, J.G., Axelrad, V., Motzny, S.J.

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  10. 10
    3.125 Gb/s power efficient line driver with 2-level pre-emphasis and 2 kV HBM ESD protection

    3.125 Gb/s power efficient line driver with 2-level pre-emphasis and 2 kV HBM ESD protection by Iniewski, K., Axelrad, V., Shibkov, A., Balasinski, A., Magierowski, S., Dlugosz, R., Dabrowsi, A.

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  11. 11
    Novel gate and substrate triggering techniques for deep sub-micron ESD protection devices

    Novel gate and substrate triggering techniques for deep sub-micron ESD protection devices by Semenov, O., Sarbishaei, H., Axelrad, V., Sachdev, M.

    Published in Microelectronics
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  12. 12
    Comments on the paper “Coupling capacitances in VLSI circuits calculated by multi-dimensional discrete fourier-series”

    Comments on the paper “Coupling capacitances in VLSI circuits calculated by multi-dimensional discrete fourier-series” by Axelrad, V., Eckart, S., Bamberg, S.

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  13. 13
    Controlling mesh effects in integrated process and device simulation

    Controlling mesh effects in integrated process and device simulation by Axelrad, V., Duane, M.

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  14. 14
    Current Filamentation and Thermal Instability in a Power BJT Array Cell

    Current Filamentation and Thermal Instability in a Power BJT Array Cell by Axelrad, V., Rollins, J. G., Motzny, S. J.

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  15. 15
    Design strategies for ESD protection in SOC

    Design strategies for ESD protection in SOC by Iniewski, K., Axelrad, V., Shibkov, A., Balasinski, A., Syrzycki, M.

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  16. 16
    Integration of costing, yield and performance metrics into the TCAD environment through the combination of DOE and RSM

    Integration of costing, yield and performance metrics into the TCAD environment through the combination of DOE and RSM by Fallon, M., Walton, A.J., Newsam, M.I., Axelrad, V., Granik, Y.

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  17. 17
    A novel CDM-like discharge effect during human body model (HBM) ESD stress

    A novel CDM-like discharge effect during human body model (HBM) ESD stress by Axelrad, V., Huh, Y., Chen, J.W., Bendix, P.

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  18. 18
    A novel procedure to evaluate design scalability based on device performance linked to photolithography data

    A novel procedure to evaluate design scalability based on device performance linked to photolithography data by Karklin, L., Balasinski, A., Axelrad, V.

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  19. 19
    A novel approach to simulate the effect of optical proximity on MOSFET parametric yield

    A novel approach to simulate the effect of optical proximity on MOSFET parametric yield by Balasinski, A., Gangala, H., Axelrad, V., Boksha, V.

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  20. 20
    CAESAR: The virtual IC factory as an integrated TCAD user environment

    CAESAR: The virtual IC factory as an integrated TCAD user environment by Axelrad, V., Granik, Y., Jewell, R.

    Published in Microelectronics
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