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An 88.9-dB SNR Fully-Dynamic Noise-Shaping SAR Capacitance-to-Digital Converter
by
Lim, Chaegang
,
Choi, Yohan
,
Song, Jaegeun
,
Ahn, Soonsung
,
Jang, Seokwon
,
Kim, Chulwoo
Published in
IEEE journal of solid-state circuits
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A 9-bit 500-MS/s 2-bit/cycle SAR ADC With Error-Tolerant Interpolation Technique
by
Song, Jaegeun
,
Park, Yunsoo
,
Lim, Chaegang
,
Choi, Yohan
,
Ahn, Soonsung
,
Park, Sooho
,
Kim, Chulwoo
Published in
IEEE journal of solid-state circuits
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An 11-b 100-MS/s Fully Dynamic Pipelined ADC Using a High-Linearity Dynamic Amplifier
by
Park, Yunsoo
,
Song, Jaegeun
,
Choi, Yohan
,
Lim, Chaegang
,
Ahn, Soonsung
,
Kim, Chulwoo
Published in
IEEE journal of solid-state circuits
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Ieee Journal Of Solid-State Circuits
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Capacitors
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Engineering
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Engineering, Electrical & Electronic
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Science & Technology
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Technology
3 results
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Analog To Digital Converters
2 results
2
Figure Of Merit
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Noise Levels
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Power Consumption
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Switches
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Voltage
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2-Bit/Cycle Successive Approximation Register Analog-To-Digital Converter
1 results
1
Amplification
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1
Amplifiers
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Analog To Digital Conversion
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Analog-Digital Conversion
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Analog-To-Digital Conversion
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Calibration
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Capacitance
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Capacitance-To-Digital Converter
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Ieee Electronic Library (Iel) Journals
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Ieee Xplore All Journals
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