Search Results - Al-Khalili, Asim J.

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  1. 1
    Postsilicon Tuning of Standby Supply Voltage in SRAMs to Reduce Yield Losses Due to Parametric Data-Retention Failures

    Postsilicon Tuning of Standby Supply Voltage in SRAMs to Reduce Yield Losses Due to Parametric Data-Retention Failures by Nourivand, A., Al-Khalili, Asim J., Savaria, Y.

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  2. 2
    Analysis of Resistive Open Defects in Drowsy SRAM Cells

    Analysis of Resistive Open Defects in Drowsy SRAM Cells by Nourivand, Afshin, Al-Khalili, Asim J., Savaria, Yvon

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  3. 3
    Simultaneous adaptive wire adjustment and local topology modification for tuning a bounded-skew clock tree

    Simultaneous adaptive wire adjustment and local topology modification for tuning a bounded-skew clock tree by Saaied, H., Al-Khalili, D., Al-Khalili, A.J., Nekili, M.

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  4. 4
    Pattern-Driven Clock Tree Routing with Via Minimization

    Pattern-Driven Clock Tree Routing with Via Minimization by Farhangi, A M, Al-Khalili, Asim J, Al-Khalili, D

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  5. 5
    Technology-portable analytical model for DSM CMOS inverter transition-time estimation

    Technology-portable analytical model for DSM CMOS inverter transition-time estimation by Kabbani, A., Al-Khalili, D., Al-Khalili, A.J.

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  6. 6
    Aggressive leakage reduction of SRAMs using error checking and correcting (ECC) techniques

    Aggressive leakage reduction of SRAMs using error checking and correcting (ECC) techniques by Nourivand, A., Al-Khalili, A.J., Savaria, Y.

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  7. 7
    Application of byte error detecting codes to the design of self-checking circuits

    Application of byte error detecting codes to the design of self-checking circuits by Pagey, Sandeep, Al-Khalili, Asim J.

    Published in Microelectronics
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  8. 8
    Estimation of ground bounce effects on CMOS circuits

    Estimation of ground bounce effects on CMOS circuits by Kabbani, A., Al-Khalili, A.J.

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  9. 9
    Performance analysis and design of optimized static random access memory (SRAM)

    Performance analysis and design of optimized static random access memory (SRAM) by Dewan, Jahangir, Haroun, Baher S., Al-khalili, Asim J.

    Published in Microelectronics
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  10. 10
    Clock tree tuning using shortest paths polygon

    Clock tree tuning using shortest paths polygon by Saaied, H., Al-Khalili, D., Al-Khalili, A.J.

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  11. 11
    A model for optimum offset between two signalized intersections

    A model for optimum offset between two signalized intersections by Al-Khalili, Asim J., Soliman, Afifi H., Alfa, Attahiru Sule

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  12. 12
    Activity management in battery-powered embedded systems: A case study of ZigBee® WSN

    Activity management in battery-powered embedded systems: A case study of ZigBee® WSN by Zarrabi, H., Al-Khalili, Asim J., Savaria, Y.

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  13. 13
    Performance of Parallel Prefix Adders implemented with FPGA technology

    Performance of Parallel Prefix Adders implemented with FPGA technology by Vitoroulis, K., Al-Khalili, A.J.

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  14. 14
    A CAD Tool for Generation of Synthesizable and Scalable Square of Binary Numbers

    A CAD Tool for Generation of Synthesizable and Scalable Square of Binary Numbers by Al-Khalili, A.J.

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  15. 15
    SRAM read-assist scheme for high performanc low power applications

    SRAM read-assist scheme for high performanc low power applications by Valaee, A., Al-Khalili, Asim J.

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  16. 16
    A two-dimensional micromachined accelerometer

    A two-dimensional micromachined accelerometer by Ahmad, H., Al-Khalili, A.J., Landsberger, L.M., Kahrizi, M.

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  17. 17
    Implementation of large-integer hardware multiplier in Xilinx FPGA

    Implementation of large-integer hardware multiplier in Xilinx FPGA by Athow, J.L., Al-Khalili, A.J.

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  18. 18
    Placement algorithm for multiplier-based FPGA circuits

    Placement algorithm for multiplier-based FPGA circuits by Athow, J.L., Al-Khalili, A.J.

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  19. 19
    A module generator for optimized CMOS buffers

    A module generator for optimized CMOS buffers by Al-Khalili, A.J., Zhu, Y., Al-Khalili, D.

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  20. 20
    Lossy compression of images using logic minimization

    Lossy compression of images using logic minimization by Augustine, J., Lynch, W., Yuke Wang, Al-Khalili, A.J.

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