Search Results - Angepat, Hari

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  1. 1
    FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators

    FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators by Chiou, D., Dam Sunwoo, Joonsoo Kim, Patil, N.A., Reinhart, W., Johnson, D.E., Keefe, J., Angepat, H.

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  2. 2
    An FPGA-based In-Line Accelerator for Memcached

    An FPGA-based In-Line Accelerator for Memcached by Lavasani, Maysam, Angepat, Hari, Chiou, Derek

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  3. 3
    Serving DNNs in Real Time at Datacenter Scale with Project Brainwave

    Serving DNNs in Real Time at Datacenter Scale with Project Brainwave by Chung, Eric, Fowers, Jeremy, Ovtcharov, Kalin, Papamichael, Michael, Caulfield, Adrian, Massengill, Todd, Liu, Ming, Lo, Daniel, Alkalay, Shlomi, Haselman, Michael, Abeydeera, Maleen, Adams, Logan, Angepat, Hari, Boehn, Christian, Chiou, Derek, Firestein, Oren, Forin, Alessandro, Gatlin, Kang Su, Ghandi, Mahdi, Heil, Stephen, Holohan, Kyle, El Husseini, Ahmad, Juhasz, Tamas, Kagi, Kara, Kovvuri, Ratna K., Lanka, Sitaram, van Megen, Friedel, Mukhortov, Dima, Patel, Prerak, Perez, Brandon, Rapsang, Amanda, Reinhardt, Steven, Rouhani, Bita, Sapek, Adam, Seera, Raja, Shekar, Sangeetha, Sridharan, Balaji, Weisz, Gabriel, Woods, Lisa, Yi Xiao, Phillip, Zhang, Dan, Zhao, Ritchie, Burger, Doug

    Published in IEEE MICRO
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  4. 4
    Configurable Clouds

    Configurable Clouds by Caulfield, Adrian M., Chung, Eric S., Putnam, Andrew, Angepat, Hari, Firestone, Daniel, Fowers, Jeremy, Haselman, Michael, Heil, Stephen, Humphrey, Matt, Kaur, Puneet, Joo-Young Kim, Lo, Daniel, Massengill, Todd, Ovtcharov, Kalin, Papamichael, Michael, Woods, Lisa, Lanka, Sitaram, Chiou, Derek, Burger, Doug

    Published in IEEE MICRO
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  5. 5
    A Cloud-Scale Acceleration Architecture

    A Cloud-Scale Acceleration Architecture by Caulfield, Adrian, Chung, Eric, Putnam, Andrew, Angepat, Hari, Fowers, Jeremy, Heil, Stephen, Kim, Joo-Young, Lo, Daniel, Papamichael, Michael, Massengill, Todd, Chiou, Derek, Burger, Doug

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  6. 6
    Accurate Functional-First Multicore Simulators

    Accurate Functional-First Multicore Simulators by Chiou, Derek, Angepat, Hari, Patil, Nikhil, Sunwoo, Dam

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  7. 7
    HGum: Messaging Framework for Hardware Accelerators

    HGum: Messaging Framework for Hardware Accelerators by Zhang, Sizhuo, Angepat, Hari, Chiou, Derek

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  8. 8
    NIFD: Non-intrusive FPGA Debugger -- Debugging FPGA 'Threads' for Rapid HW/SW Systems Prototyping

    NIFD: Non-intrusive FPGA Debugger -- Debugging FPGA 'Threads' for Rapid HW/SW Systems Prototyping by Angepat, H, Eads, G, Craik, C, Chiou, D

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  9. 9
    Parallelizing computer system simulators

    Parallelizing computer system simulators by Chiou, D., Dam Sunwoo, Angepat, H., Joonsoo Kim, Patil, N.A., Reinhart, W., Johnson, D.E.

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  10. 10
    FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators

    FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators by Chiou, Derek, Sunwoo, Dam, Kim, Joonsoo, Patil, Nikhil A., Reinhart, William, Johnson, Darrel Eric, Keefe, Jebediah, Angepat, Hari

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