Search Results - Anupreetham

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  1. 1
    SpQuant-SNN: ultra-low precision membrane potential with sparse activations unlock the potential of on-device spiking neural networks applications

    SpQuant-SNN: ultra-low precision membrane potential with sparse activations unlock the potential of on-device spiking neural networks applications by Hasssan, Ahmed, Meng, Jian, Anupreetham, Anupreetham, Seo, Jae-Sun

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  2. 2
    High Throughput FPGA-Based Object Detection via Algorithm-Hardware Co-Design

    High Throughput FPGA-Based Object Detection via Algorithm-Hardware Co-Design by Anupreetham, Anupreetham, Ibrahim, Mohamed, Hall, Mathew, Boutros, Andrew, Kuzhively, Ajay, Mohanty, Abinash, Nurvitadhi, Eriko, Betz, Vaughn, Cao, Yu, Seo, Jae-Sun

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  3. 3
    PS-IMC: A 2385.7-TOPS/W/b Precision Scalable In-Memory Computing Macro With Bit-Parallel Inputs and Decomposable Weights for DNNs

    PS-IMC: A 2385.7-TOPS/W/b Precision Scalable In-Memory Computing Macro With Bit-Parallel Inputs and Decomposable Weights for DNNs by Sridharan, Amitesh, Saikia, Jyotishman, Anupreetham, Zhang, Fan, Seo, Jae-Sun, Fan, Deliang

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  4. 4
    3-D In-Sensor Computing for Real-Time DVS Data Compression: 65-nm Hardware-Algorithm Co-Design

    3-D In-Sensor Computing for Real-Time DVS Data Compression: 65-nm Hardware-Algorithm Co-Design by Nair, Gopikrishnan R., Nalla, Pragnya S., Krishnan, Gokul, Anupreetham, Oh, Jonghyun, Hassan, Ahmed, Yeo, Injune, Kasichainula, Kishore, Seok, Mingoo, Seo, Jae-Sun, Cao, Yu

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  5. 5
    End-to-End FPGA-based Object Detection Using Pipelined CNN and Non-Maximum Suppression

    End-to-End FPGA-based Object Detection Using Pipelined CNN and Non-Maximum Suppression by Anupreetham, Anupreetham, Ibrahim, Mohamed, Hall, Mathew, Boutros, Andrew, Kuzhively, Ajay, Mohanty, Abinash, Nurvitadhi, Eriko, Betz, Vaughn, Cao, Yu, Seo, Jae-sun

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  6. 6
    Digital Versus Analog Artificial Intelligence Accelerators: Advances, trends, and emerging designs

    Digital Versus Analog Artificial Intelligence Accelerators: Advances, trends, and emerging designs by Seo, Jae-sun, Saikia, Jyotishman, Meng, Jian, He, Wangxin, Suh, Han-sok, Anupreetham, Liao, Yuan, Hasssan, Ahmed, Yeo, Injune

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  7. 7
    Torch2Chip: An End-to-end Customizable Deep Neural Network Compression and Deployment Toolkit for Prototype Hardware Accelerator Design

    Torch2Chip: An End-to-end Customizable Deep Neural Network Compression and Deployment Toolkit for Prototype Hardware Accelerator Design by Meng, Jian, Liao, Yuan, Anupreetham, Anupreetham, Hasssan, Ahmed, Yu, Shixing, Han-sok Suh, Hu, Xiaofeng, Jae-sun, Seo

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