Search Results - Atapattu, Sachille

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  1. 1
    Real time all intra HEVC HD encoder on FPGA

    Real time all intra HEVC HD encoder on FPGA by Atapattu, Sachille, Liyanage, Namitha, Menuka, Nisal, Perera, Ishantha, Pasqual, Ajith

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  2. 2
    Predictable Accelerator Design with Time-Sensitive Affine Types

    Predictable Accelerator Design with Time-Sensitive Affine Types by Nigam, Rachit, Atapattu, Sachille, Thomas, Samuel, Li, Zhijing, Bauer, Theodore, Ye, Yuwei, Koti, Apurva, Sampson, Adrian, Zhang, Zhiru

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  3. 3
    High performance hardware architectures for Intra Block Copy and Palette Coding for HEVC screen content coding extension

    High performance hardware architectures for Intra Block Copy and Palette Coding for HEVC screen content coding extension by Senanayake, Rishan, Liyanage, Namitha, Wijeratne, Sasindu, Atapattu, Sachille, Athukorala, Kasun, Tharaka, P. M. K., Karunaratne, Geethan, Senarath, R. M. A. U., Perera, Ishantha, Ekanayake, Ashen, Pasqual, Ajith

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