Search Results - Ballesil-Alvarez, Anastacia

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  1. 1
    Design of Multiple Prediction Complexity Configurations for an FPGA-Based H.264 Baseline Profile Encoder

    Design of Multiple Prediction Complexity Configurations for an FPGA-Based H.264 Baseline Profile Encoder by Galila Cabigao, Noelle Beatrix, Carmina Rae Villanueva Gonzaga, Maria, Laure Anastacia Ballesil Alvarez, Hazel Deluso, Theresa Gusad De Leon, Maria, Jagunap Densing, Chris Vincent, Richard Ereso Hizon, John, Rosales, Marc Driz

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  2. 2
    High-level implementation of the 5-stage pipelined ARM9TDM core

    High-level implementation of the 5-stage pipelined ARM9TDM core by Arandilla, C C, Constantino, J B A, Glova, A O M, Ballesil-Alvarez, A P, Reyes, J A P

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  3. 3
    Power and Area Oriented Implementations of Lightweight Cryptographic Algorithms for Wireless Sensor Networks

    Power and Area Oriented Implementations of Lightweight Cryptographic Algorithms for Wireless Sensor Networks by Cruz Torreno, Alexis Czezar, Gusad De Leon, Maria Theresa, Rosales, Marc Driz, Ballesil Alvarez, Anastacia

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  4. 4
    1V supply 16-bit second order Sigma-Delta modulator in a 90nm CMOS process

    1V supply 16-bit second order Sigma-Delta modulator in a 90nm CMOS process by Amistoso, R. M. F., Bautista, M. J. A., Delos Santos, Rafael Karlo D. P., Ortiz, J. R. R., Alarcon, L. P., Ballesil-Alvarez, A., Hizon, R. E.

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  5. 5
    Hardware-Based Model of Node Clustering Using Q-Learning for Wireless Sensor Networks

    Hardware-Based Model of Node Clustering Using Q-Learning for Wireless Sensor Networks by Delos Santos Manarang, Gienel Francheska, Rodriguez Mina, Rusty John Lloyd, Reyes Salvador, Mikko Chino, Gusad De Leon, Maria Theresa, Jagunap Densing, Chris Vincent, Rosales, Marc Driz, Ballesil Alvarez, Anastacia

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  6. 6
    Design and Implementation of a Thermoelectric Energy Harvesting Interface Circuit with Maximum Power Point Tracking and Self-Startup Capability for Wireless Sensor Nodes

    Design and Implementation of a Thermoelectric Energy Harvesting Interface Circuit with Maximum Power Point Tracking and Self-Startup Capability for Wireless Sensor Nodes by Antenor, Abigail Alejandro, Campang, Kristine Delica, Rafols, Khristen Anne Mendoza, Ballesil-Alvarez, Anastacia, Gusad De Leon, Maria Theresa, Densing, Chris Vincent Jagunap, Maestro, Rico Jossel Mindoro, Rosales, Marc Driz

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  7. 7
    0.6V correlators for WLAN receivers

    0.6V correlators for WLAN receivers by Abaya, T., Ancajas, D., Ballesil-Alvarez, A.P., Alarcon, L.A.

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  8. 8
    Register Caching as a Way of Mitigating Intercluster Communication Penalties in Clustered Microarchitectures

    Register Caching as a Way of Mitigating Intercluster Communication Penalties in Clustered Microarchitectures by Tan, Wilson Mazo, Alarilla, Luis M., Alvarez, Anastacia Ballesil

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  9. 9
    A USB 2.0 controller for an ARM7TDM-S processor implemented in FPGA

    A USB 2.0 controller for an ARM7TDM-S processor implemented in FPGA by Difuntorum, J. K. L., Matutina, K. M. U., Tong, A. J. M. Z., Alvarez, A. B., Madamba, J. A. R.

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