Analysis of USJ formation with combined RTA/laser annealing conditions for 28 nm high-k/metal gate CMOS technology using advanced TCAD for process and device simulation by BAZIZI, E. M, ZAKA, A, BENISTANT, F

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Studies of implanted boron emitters for solar cell applications by Pawlak, B. J., Janssens, T., Singh, S., Kuzma-Filipek, I., Robbelein, J., Posthuma, N. E., Poortmans, J., Cristiano, F., Bazizi, E. M.

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Modeling of the effect of the buried Si–SiO2 interface on transient enhanced boron diffusion in silicon on insulator by Bazizi, E. M., Fazzini, P. F., Pakfar, A., Tavernier, C., Vandelle, B., Kheyrandish, H., Paul, S., Lerch, W., Cristiano, F.

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Highly-Doped Through-Contact Silicon Epi Design at 3 nm node by Mittal, S., Pal, A., Saremi, M., Ferrell, J., Haverty, M., Miyashita, T., Kim, N., Bazizi, E. M., Alexander, B., Sachid, A. B., Ayyagari, B.

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Transfer of physically-based models from process to device simulations: Application to advanced SOI MOSFETs by Bazizi, E.M., Pakfar, A., Fazzini, P.F., Cristiano, F., Tavernier, C., Claverie, A., Zographos, N., Zechner, C., Scheid, E.

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Modelling of Boron Trapping at End-of-Range defects in pre-amorphized ultra-shallow junctions by Bazizi, E.M., Fazzini, P.F., Zechner, C., Tsibizov, A., Kheyrandish, H., Pakfar, A., Ciampolini, L., Tavernier, C., Cristiano, F.

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Advanced TCAD simulation of local mismatch in 14nm CMOS technology FinFETs by Bazizi, E. M., Chakarov, I., Herrmann, T., Zaka, A., Jiang, L., Wu, X., Pandey, S. M., Benistant, F., Reid, D., Brown, A. R., Alexander, C., Millar, C., Asenov, A.

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Impact of backplane configuration on the statistical variability in 22nm FDSOI CMOS by Bazizi, E. M., Chakarov, I., Herrmann, T., Zaka, A., Jiang, L., Wu, X., Pandey, S. M., Benistant, F., Reid, D., Brown, A. R., Alexander, C., Millar, C., Asenov, A.

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Hybrid Bonding Technology: Chemical Mechanical Planarization Process Optimization Using Comprehensive 3D Modeling by Jiang, L., Bazizi, E. M., Costrini, G., Lianto, P., See, G., Tsamados, D., Saad, Y., Dag, S., Mehta, G., Yang, Y. C., Sundarrajan, A., Kengeri, S.

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TCAD Simulation on FinFET n-type Power Device HCI Reliability Improvement by Zhu, B., Bazizi, E. M., Tng, J.H.M., Li, Z., Banghart, E. K., Hassan, M. K., Hu, Y., Zhou, D., Choi, D., Qin, L., Wan, X.

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14nm FinFET Device Boost via 2nd Generation Fins Optimized for High Performance CMOS Applications by Bazizi, E. M., Banghart, E. K., Zhu, B., Tng, J. H. M., Benistant, F., Hu, Y., He, X., Zhou, D., Lo, H.-C., Choi, D., Lee, J. G.

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Optimization of RF-22nm FDSOI figures of merit with 3D TCAD simulation by Scheiblin, P., Andee, Y., Mazurier, J., Harame, D., Lacord, J., Lucci, L., Barbe, J.C., Zaka, A., Bazizi, E. M., Herrmann, T., Morvan, S., Pirro, L.

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Multiple Workfunction High Performance FinFETs for Ultra-low Voltage Operation by Togo, M., Asra, R., Balasubramaniam, P., Zhang, X., Yu, H., Yamaguchi, S., Geiss, E., Yang, H. S., Cohen, B., Lo, H-C., Hu, O., Lazar, H., Kwon, O., Burnett, D., Versaggi, J., Banghart, E., Hassan, M. K., Bazizi, E., Pantisano, L., Lee, J. G., Samavedam, S. B., Sohn, D. K.

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Modeling of the effect of the buried Si - SiO 2 interface on transient enhanced boron diffusion in silicon on insulator by Bazizi, E. M., Fazzini, P. F., Pakfar, A., Tavernier, C., Vandelle, B., Kheyrandish, H., Paul, S., Lerch, W., Cristiano, F.

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Versatile technology modeling for 22FDX platform development by Bazizi, E. M., Zaka, A., Herrmann, T., Cortes, I., Jiang, L., Goh, M. H. J., Deb Roy, S., Nowak, E., Kluth, G., Javorka, P., Pirro, L., Mazurier, J., Harame, D., Kammler, T., Hoentschel, J., Schaeffer, J., Benistant, F., Rice, B.

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Investigation of Embedded SiGe Source/Drain for 28nm HKMG PFET Performance Enhancement by Bazizi, El Mehdi, Zaka, Alban, Dilliway, Gabriela, Bai, Bo, Wiatr, Maciej, Benistant, Francis, Horstmann, Manfred

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USJ engineering impacts on FinFETs and RDF investigation using full 3D process/device simulation by Bazizi, E. M., Zaka, A., Herrmann, T., Benistant, F., Tin, J. H. M., Goh, J. P., Jiang, L., Joshi, M., van Meer, H., Korablev, K.

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Advanced TCAD for predictive FinFETs Vth mismatch using full 3D process/device simulation by Bazizi, E. M., Zaka, A., Herrmann, T., Benistant, F., Tin, J. H. M., Goh, J. P., Jiang, L., Joshi, M., van Meer, H., Korablev, K.

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PD-SOI MOSFETs: interface effect on point defects and doping profiles by Bazizi, E.M., Pakfar, A., Fazzini, P.F., Cristiano, F., Tavernier, C., Claverie, A., Burenkov, A., Pichler, P.

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Comparison between 65nm bulk and PD-SOI MOSFETs: Si/BOX interface effect on point defects and doping profiles by Bazizi, E.M., Pakfar, A., Fazzini, P.F., Cristiano, F., Tavernier, C., Claverie, A., Burenkov, A., Pichler, P.

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