Search Results - Belluomini, Wendy

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  1. 1
    Energy Proportionality for Storage: Impact and Feasibility

    Energy Proportionality for Storage: Impact and Feasibility by GUERRA, Jorge, BELLUOMINI, Wendy, GLIDER, Joseph, GUPTA, Karan, PUCHA, Himabindu

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  2. 2
    Undetected disk errors in RAID arrays

    Undetected disk errors in RAID arrays by Hafner, J L, Deenadhayalan, V, Belluomini, W, Rao, K

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  3. 3
    GAUL: Gestalt Analysis of Unstructured Logs for Diagnosing Recurring Problems in Large Enterprise Storage Systems

    GAUL: Gestalt Analysis of Unstructured Logs for Diagnosing Recurring Problems in Large Enterprise Storage Systems by Pin Zhou, Gill, B, Belluomini, W, Wildani, A

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  4. 4
    Flipstone: Managing Storage with Fail-In-Place and Deferred Maintenance Service Models : System Work at IBM Research

    Flipstone: Managing Storage with Fail-In-Place and Deferred Maintenance Service Models : System Work at IBM Research by BANIKAZEMI, Mohammad, HAFNER, Jim, BELLUOMINI, Wendy, RAO, KK, POFF, Dan, ABALI, Bulent

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  5. 5
    Flipstone: managing storage with fail-in-place and deferred maintenance service models

    Flipstone: managing storage with fail-in-place and deferred maintenance service models by Banikazemi, Mohammad, Hafner, Jim, Belluomini, Wendy, Rao, KK, Poff, Dan, Abali, Bulent

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  6. 6
    Evaluating the impact of Undetected Disk Errors in RAID systems

    Evaluating the impact of Undetected Disk Errors in RAID systems by Rozier, E., Belluomini, W., Deenadhayalan, V., Hafner, J., Rao, K.K., Zhou, P.

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  7. 7
    Limited switch dynamic logic circuits for high-speed low-power circuit design

    Limited switch dynamic logic circuits for high-speed low-power circuit design by Belluomini, W., Jamsek, D., Martin, A. K., McDowell, C., Montoye, R. K., Ngo, H. C., Sawada, J.

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  8. 8
    Timed state space exploration using POSETs

    Timed state space exploration using POSETs by Belluomini, W., Myers, C.J.

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  9. 9
    Timed circuit verification using TEL structures

    Timed circuit verification using TEL structures by Belluomini, W., Myers, C.J., Hofstee, H.P.

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  10. 10
    An 8GHz floating-point multiply

    An 8GHz floating-point multiply by Belluomini, W., Jamsek, D., Martin, A., McDowell, C., Montoye, R., Nguyen, T., Hung Ngo, Sawada, J., Vo, I., Datta, R.

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  11. 11
    Verification of delayed-reset domino circuits using ATACS

    Verification of delayed-reset domino circuits using ATACS by Belluomini, W., Myers, C.J., Hofstee, H.P.

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  12. 12
    Timed circuit synthesis using implicit methods

    Timed circuit synthesis using implicit methods by Thacker, R.A., Belluomini, W., Myers, C.J.

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  13. 13
    Timed circuits: a new paradigm for high-speed design

    Timed circuits: a new paradigm for high-speed design by Myers, Chris J., Belluomini, Wendy, Kallpack, Kip, Peskin, Eric, Zheng, Hao

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  14. 14
    Availability of consumer sources of dietary vitamin D (630.3)

    Availability of consumer sources of dietary vitamin D (630.3) by Plawecki, Karen, Chapman‐Novakofski, Karen, Dahl, Wendy, Meck Higgins, Mary, Hongu, Nobuko Kay, Horacek, Tanya, Tobey, Lauren, Belluomini, Mary, Qualls, Jennifer, Vadala, Amanda

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