The experiences of Dutch fathers on fathering children with disabilities: ‘Hey, that is a father and his daughter, that is it’ by Schippers, A., Berkelaar, M., Bakker, M., Van Hove, G.

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Effects of induced hyperinsulinaemia with and without hyperglycaemia on measures of cardiac vagal control by Berkelaar, M., Eekhoff, E. M. W., Simonis-Bik, A. M. C., Boomsma, D. I., Diamant, M., Ijzerman, R. G., Dekker, J. M., ’t Hart, L. M., de Geus, E. J. C.

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Axotomy results in delayed death and apoptosis of retinal ganglion cells in adult rats by Berkelaar, M, Clarke, DB, Wang, YC, Bray, GM, Aguayo, AJ

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Comparison of Human Articular Cartilage Tissue and Chondrocytes Isolated from Peripheral versus Central Regions of Traumatic Lesions by Acevedo, Lina, Iselin, Lukas, Berkelaar, Majoska H. M., Salzmann, Gian M., Wolf, Francine, Feliciano, Sandra, Vogel, Nicole, Pagenstert, Geert, Martin, Ivan, Pelttari, Karoliina, Barbero, Andrea, Arnold, Markus P.

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Stochastic Analysis of Deep-Submicrometer CMOS Process for Reliable Circuits Designs by Zjajo, A, Qin Tang, Berkelaar, M, Pineda de Gyvez, Jose, Di Bucchianico, A, van der Meijs, N

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Efficient and effective redundancy removal for million-gate circuits by Berkelaar, M., van Eijk, K.

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Computing observability don't cares efficiently through polarization by Arts, H., Berkelaar, M., Van Eijk, K.

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Transistor-level gate model based statistical timing analysis considering correlations by Qin Tang, Zjajo, A., Berkelaar, M., van der Meijs, N.

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Layout driven optimization of datapath circuits using arithmetic reasoning by Neumann, I., Stoffel, D., Sulimma, K., Berkelaar, M., Kunz, W.

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Statistical delay calculation with Multiple Input Simultaneous Switching by Qin Tang, Zjajo, A, Berkelaar, M, van der Meijs, N

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Balanced Truncation of a stable non-minimal deep-submicron CMOS interconnect by Zjajo, A, Tang, Q, Berkelaar, M, van der Meijs, N

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Gate sizing using a statistical delay model by Jacobs, E.T.A.F., Berkelaar, M.R.C.M.

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Noise analysis of non-linear dynamic integrated circuits by Zjajo, A, Qin Tang, Berkelaar, M, van der Meijs, N

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Pseudo circuit model for representing uncertainty in waveforms by Nigam, A, Qin Tang, Zjajo, A, Berkelaar, M, van der Meijs, N

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Computing the entire active area/power consumption versus delay tradeoff curve for gate sizing with a piecewise linear simulator by Berkelaar, M.R.C.M., Buurman, P.H.W., Jess, J.A.G.

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Statistical timing and worst-delay corner analysis by Berkelaar, M, Cortadella, J

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Polarized observability don't cares by Arts, H., Berkelaar, M., Van Eijk, C.A.J.

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Crosstalk-aware statistical interconnect delay calculation by Qin Tang, Zjajo, A., Berkelaar, M., van der Meijs, N.

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Accuracy consideration of a non-Gaussian interconnect delay model for submicron CMOS statistical static timing analysis by Zjajo, Amir, Qin Tang, Berkelaar, M., van der Meijs, N.

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Adaptive numerical integration methods for deterministic analysis of non-stationary noise in dynamic integrated circuits by Zjajo, A., Qin Tang, Berkelaar, M., van der Meijs, N.

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