Search Results - Bertoni, Guido

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  1. 1
    A fault induction technique based on voltage underfeeding with application to attacks against AES and RSA

    A fault induction technique based on voltage underfeeding with application to attacks against AES and RSA by Barenghi, Alessandro, Bertoni, Guido M., Breveglieri, Luca, Pelosi, Gerardo

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  2. 2
    A Fault-Based Secret Key Retrieval Method for ECDSA: Analysis and Countermeasure

    A Fault-Based Secret Key Retrieval Method for ECDSA: Analysis and Countermeasure by Barenghi, Alessandro, Bertoni, Guido M., Breveglieri, Luca, Pelosi, Gerardo, Sanfilippo, Stefano, Susella, Ruggero

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  3. 3
    Sufficient conditions for sound tree and sequential hashing modes

    Sufficient conditions for sound tree and sequential hashing modes by Bertoni, Guido, Daemen, Joan, Peeters, Michaël, Van Assche, Gilles

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  4. 4
    A pairing SW implementation for Smart-Cards

    A pairing SW implementation for Smart-Cards by Bertoni, Guido M., Breveglieri, Luca, Chen, Liqun, Fragneto, Pasqualina, Harrison, Keith A., Pelosi, Gerardo

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  5. 5
    Security Evaluation of WDDL and SecLib Countermeasures against Power Attacks

    Security Evaluation of WDDL and SecLib Countermeasures against Power Attacks by Guilley, S., Sauvage, L., Hoogvorst, P., Pacalet, R., Bertoni, G.M., Chaudhuri, S.

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  6. 6
    Special Section on Secure Computer Architectures

    Special Section on Secure Computer Architectures by Schaumont, Patrick, Lee, Ruby, Perez, Ronald, Bertoni, Guido

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  7. 7
    CASCA: A Design Automation Approach for Designing Hardware Countermeasures Against Side-Channel Attacks

    CASCA: A Design Automation Approach for Designing Hardware Countermeasures Against Side-Channel Attacks by Delledonne, Lorenzo, Zaccaria, Vittorio, Susella, Ruggero, Bertoni, Guido, Melzani, Filippo

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  8. 8
    Error analysis and detection procedures for a hardware implementation of the advanced encryption standard

    Error analysis and detection procedures for a hardware implementation of the advanced encryption standard by Bertoni, G., Breveglieri, L., Koren, I., Maistri, P., Piuri, V.

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  9. 9
    A Methodology for the Characterisation of Leakages in Combinatorial Logic

    A Methodology for the Characterisation of Leakages in Combinatorial Logic by Bertoni, Guido, Martinoli, Marco, Molteni, Maria Chiara

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  10. 10
    The Making of KECCAK

    The Making of KECCAK by Bertoni, Guido, Daemen, Joan, Peeters, Michaël, Van Assche, Gilles

    Published in Cryptologia
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  11. 11
    Low voltage fault attacks to AES

    Low voltage fault attacks to AES by Barenghi, Alessandro, Bertoni, Guido M, Breveglieri, Luca, Pellicioli, Mauro, Pelosi, Gerardo

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  12. 12
    The Making of K ECCAK

    The Making of K ECCAK by Bertoni, Guido, Daemen, Joan, Peeters, Michaël, Van Assche, Gilles

    Published in Cryptologia
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  13. 13
    Introduction to the CHES 2013 special issue

    Introduction to the CHES 2013 special issue by Bertoni, Guido, Coron, Jean-Sébastien

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  14. 14
    A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp

    A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp by Barenghi, A., Bertoni, G., Breveglieri, L., Pelosi, G.

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  15. 15
    An efficient hardware-based fault diagnosis scheme for AES: performances and cost

    An efficient hardware-based fault diagnosis scheme for AES: performances and cost by Bertoni, G., Breveglieri, L., Koren, I., Maistri, P.

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  16. 16
    Low Voltage Fault Attacks on the RSA Cryptosystem

    Low Voltage Fault Attacks on the RSA Cryptosystem by Barenghi, A., Bertoni, G., Parrinello, E., Pelosi, G.

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  17. 17
    A novel fault attack against ECDSA

    A novel fault attack against ECDSA by Barenghi, A., Bertoni, G., Palomba, A., Susella, R.

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  18. 18
    AES power attack based on induced cache miss and countermeasure

    AES power attack based on induced cache miss and countermeasure by Bertoni, G., Zaccaria, V., Breveglieri, L., Monchiero, M., Palermo, G.

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  19. 19
    Efficient finite field digit-serial multiplier architecture for cryptography applications

    Efficient finite field digit-serial multiplier architecture for cryptography applications by Bertoni, G., Breveglieri, L., Fragneto, P.

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  20. 20
    Fault attack on AES with single-bit induced faults

    Fault attack on AES with single-bit induced faults by Barenghi, Alessandro, Bertoni, Guido M., Breveglieri, Luca, Pellicioli, Mauro, Pelosi, Gerardo

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