Caractérisation d'une IP VHDL de réseau sur puce en SystemC by Jovanovic, S., Berviller, Y., Weber, S.

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Design and implementation of a new digital automatic gain control by Tisserand, E, Berviller, Y

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Original structure for Walsh–Hadamard transform on sliding window by Tisserand, E, Berviller, Y

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Memristive behaviour of high-impedance faults by Tisserand, E, Berviller, Y, Humbert, J.B

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An Embedded and Programmable System Based FPGA for Real Time MPEG Stream Buffer Analysis by Tanougast, C., Janiaut, M., Berviller, Y., Rabah, H., Weber, S., Bouridane, A.

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Adaptive ADPLL architecture for MPEG system clock related measurements in variable rate environment by Rabah, H., Mannino, C., Berviller, Y., Tanougast, C., Weber, S.

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Efficient implementation of a 3-D medical imaging compression system using CAVLC by Ahmad, A, Amira, A, Guarisco, M, Rabah, H, Berviller, Y

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A new ADPLL architecture dedicated to program clock references synchronization by Mannino, C., Rabah, H., Weber, S., Tanougast, C., Berviller, Y., Janiaut, M.

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Hardware partitioning software for dynamically reconfigurable SoC design by Brunet, P., Tanougast, C., Berviller, Y., Weber, S.

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Optimized FPGA implementation of a multi program PCR related measurements system in DVB-T: architecture exploration by Mannino, C., Rabah, H., Weber, S., Tanougast, C., Berviller, Y., Janiaut, M.

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Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system by Tanougast, C., Berviller, Y., Brunet, P., Weber, S., Rabah, H.

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An Embedded and Programmable System Based FPGA for Real Time MPEG Stream Buffer Analysis by Tanougast, Camel, Janiaut, M., Berviller, Y., Rabah, Hassan, Weber, Serge, Bouridane, A.

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SOPC design of an impedance analyser without current measurement by Hamed, A., Tisserand, E., Schweitzer, P., Berviller, Y.

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A Partitioning Methodology That Optimises the Area on Reconfigurable Real-Time Embedded Systems by Tanougast, Camel, Berviller, Yves, Weber, Serge, Brunet, Philippe

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A new ADPLL architecture dedicated to program clock references synchronization by Mannino, C., Rabah, H., Weber, S., Tanougast, C., Berviller, Y., Janiaut, M.

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Transrating by frequencies selectivity for H.264/AVC intra pictures by Deknudt, C., Corlay, P., Bacquet, A.S., Coudoux, F.X., Guarisco, M., Rabah, H., Berviller, Y., Weber, S.

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Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system by Tanougast, C., Berviller, Y., Brunet, P., Weber, S., Rabah, H.

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FPGA-based architectures of finite radon transform for medical image de-noising by Ahmad, A, Amira, A, Rabah, H, Berviller, Y

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Embedded System Design for Impedance Measurement of Multi-piezo Sensor by Hamed, A, Tisserand, E, Berviller, Y, Schweitzer, P

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An efficient VLSI implementation of H.264/AVC intra-frame transcoder by Guarisco, M., Dabellani, E., Marques, N., Rabah, H., Berviller, Y., Weber, S.

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