Search Results - Bhoi, Bandan

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  1. 1
    Design and evaluation of an efficient parity-preserving reversible QCA gate with online testability

    Design and evaluation of an efficient parity-preserving reversible QCA gate with online testability by Bhoi, Bandan, Misra, Neeraj Kumar, Pradhan, Manoranjan

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  2. 2
    FPGA based implementation for extracting the roots of real number

    FPGA based implementation for extracting the roots of real number by Padhan, Saroj Kumar, Gadtia, Subigyan, Bhoi, Bandan

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  3. 3
    Efficient architecture for arithmetic designs using perpendicular NanoMagnetic Logic

    Efficient architecture for arithmetic designs using perpendicular NanoMagnetic Logic by Misra, Neeraj Kumar, Bhoi, Bandan Kumar

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  4. 4
    Utilizing a Novel Universal Quantum Gate in the Design of Fault-Tolerant Architecture

    Utilizing a Novel Universal Quantum Gate in the Design of Fault-Tolerant Architecture by Misra, Neeraj Kumar, Bhoi, Bandan Kumar, Kassa, Sankit Ramkrishna

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  5. 5
    Fast signed multiplier using Vedic Nikhilam algorithm

    Fast signed multiplier using Vedic Nikhilam algorithm by Sahu, Satya Ranjan, Bhoi, Bandan Kumar, Pradhan, Manoranjan

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  6. 6
    Designing digital circuits using 3D nanomagnetic logic architectures

    Designing digital circuits using 3D nanomagnetic logic architectures by Bhoi, Bandan Kumar, Pathak, Nirupma, Kumar, Santosh, Misra, Neeraj Kumar

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  7. 7
    Optimization of Parameters of Adders and Barrel Shifter Based on Emerging QCA Technology

    Optimization of Parameters of Adders and Barrel Shifter Based on Emerging QCA Technology by Pathak, Nirupma, Misra, Neeraj Kumar, Bhoi, Bandan Kumar, Kumar, Santosh

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  8. 8
    Low-energy 3:2 Compressor Using XOR-XNOR Gate Combined with 2:1 Multiplexer in QCA Technology

    Low-energy 3:2 Compressor Using XOR-XNOR Gate Combined with 2:1 Multiplexer in QCA Technology by Kassa, Sankit, Misra, Neeraj Kumar, Ahmadpour, Seyed-Sajad, Bhoi, Bandan Kumar

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  9. 9
    An efficient redundant binary adder with revised computational rules

    An efficient redundant binary adder with revised computational rules by Barik, Ranjan Kumar, Bhoi, Bandan Kumar, Pradhan, Manoranjan

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  10. 10
    Synthesis and simulation study of non-restoring cell architecture layout in perpendicular nano-magnetic logic

    Synthesis and simulation study of non-restoring cell architecture layout in perpendicular nano-magnetic logic by Bhoi, Bandan Kumar, Misra, Neeraj Kumar, Pradhan, Manoranjan

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  11. 11
    A modular approach for testable conservative reversible multiplexer circuit for nano-electronic confine application

    A modular approach for testable conservative reversible multiplexer circuit for nano-electronic confine application by Pathak, Nirupma, Kumar, Santosh, Misra, Neeraj Kumar, Bhoi, Bandan Kumar

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  12. 12
    Novel binary divider architecture for high speed VLSI applications

    Novel binary divider architecture for high speed VLSI applications by Senapati, Ratiranjan, Bhoi, Bandan Kumar, Pradhan, Manoranjan

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  13. 13
    An improved FPGA based model for automatic traffic sign detection

    An improved FPGA based model for automatic traffic sign detection by Pradhan, Mohan Chandra, Satpathy, Sambit, Bhoi, Bandan Kumar

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