Search Results - Biancolin, David

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  1. 1
    Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs

    Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs by Amid, Alon, Biancolin, David, Gonzalez, Abraham, Grubb, Daniel, Karandikar, Sagar, Liew, Harrison, Magyar, Albert, Mao, Howard, Ou, Albert, Pemberton, Nathan, Rigge, Paul, Schmidt, Colin, Wright, John, Zhao, Jerry, Shao, Yakun Sophia, Asanovic, Krste, Nikolic, Borivoje

    Published in IEEE MICRO
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  2. 2
    Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim

    Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim by Biancolin, David, Magyar, Albert, Karandikar, Sagar, Amid, Alon, Nikolic, Borivoje, Bachrach, Jonathan, Asanovic, Krste

    Published in IEEE MICRO
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  3. 3
    FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud

    FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud by Karandikar, Sagar, Mao, Howard, Kim, Donggyu, Biancolin, David, Amid, Alon, Lee, Dayeol, Pemberton, Nathan, Amaro, Emmanuel, Schmidt, Colin, Chopra, Aditya, Huang, Qijing, Kovacs, Kyle, Nikolic, Borivoje, Katz, Randy, Bachrach, Jonathan, Asanovic, Krste

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  4. 4
    The Cytoskeletal Transport Protein, Secretagogin, Is Essential for Diurnal Glucagon-like Peptide-1 Secretion in Mice

    The Cytoskeletal Transport Protein, Secretagogin, Is Essential for Diurnal Glucagon-like Peptide-1 Secretion in Mice by Biancolin, Andrew David, Srikrishnaraj, Arjuna, Jeong, Hyerin, Martchenko, Alexandre, Brubaker, Patricia Lee

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  5. 5
    Fine-Grained Interconnect Synthesis

    Fine-Grained Interconnect Synthesis by Rodionov, Alex, Biancolin, David, Rose, Jonathan

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  6. 6
    A Hardware Accelerator for Computing an Exact Dot Product

    A Hardware Accelerator for Computing an Exact Dot Product by Koenig, Jack, Biancolin, David, Bachrach, Jonathan, Asanovic, Krste

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  7. 7
    Golden Gate: Bridging The Resource-Efficiency Gap Between ASICs and FPGA Prototypes

    Golden Gate: Bridging The Resource-Efficiency Gap Between ASICs and FPGA Prototypes by Magyar, Albert, Biancolin, David, Koenig, John, Seshia, Sanjit, Bachrach, Jonathan, Asanovic, Krste

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  8. 8
    FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud

    FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud by Karandikar, Sagar, Mao, Howard, Kim, Donggyu, Biancolin, David, Amid, Alon, Lee, Dayeol, Pemberton, Nathan, Amaro, Emmanuel, Schmidt, Colin, Chopra, Aditya, Huang, Qijing, Kovacs, Kyle, Nikolic, Borivoje, Katz, Randy Howard, Bachrach, Jonathan, Asanovic, Krste

    Published in IEEE MICRO
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  9. 9
    JITPCB

    JITPCB by Bachrach, Jonathan, Biancolin, David, Buchan, Austin, Haldane, Duncan W., Lin, Richard

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  10. 10
    DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles

    DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles by Kim, Donggyu, Celio, Christopher, Karandikar, Sagar, Biancolin, David, Bachrach, Jonathan, Asanovic, Krste

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