Search Results - Burdia, D.

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  1. 1
    A New Systolic Array Algorithm and Architecture for the VLSI Implementation of IDST Based on a Pseudo-Band Correlation Structure

    A New Systolic Array Algorithm and Architecture for the VLSI Implementation of IDST Based on a Pseudo-Band Correlation Structure by CHIPER, D. F., CRACAN, A., BURDIA, D.

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  2. 2
    Delay and short-circuit power expressions characterizing a CMOS inverter driving resistive interconnect

    Delay and short-circuit power expressions characterizing a CMOS inverter driving resistive interconnect by Burdia, D., Grigore, G., Ionascu, C.

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  3. 3
    Power-on reset circuit for SoC with multiple I/O power supplies

    Power-on reset circuit for SoC with multiple I/O power supplies by Burdia, D., Lazar, A., Lazar, L-C, Alecsandrescu, I-E

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  4. 4
    Design and implementation of video DAC in 0.13μm CMOS technology

    Design and implementation of video DAC in 0.13μm CMOS technology by Ionascu, C., Burdia, D.

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  5. 5
    On-chip power-on reset strategy and I/O power supply detection for VLSI circuits

    On-chip power-on reset strategy and I/O power supply detection for VLSI circuits by Burdia, D., Lazar, G.-A., Lazar, L.-C., Buzatu, N.-R.

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  6. 6
    A bandgap reference circuit design for Power-on Reset related circuits

    A bandgap reference circuit design for Power-on Reset related circuits by Lazar, A., Florea, M., Burdia, D., Lazar, L.-C., Lazar, G.-A., Butnicu, D.

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  7. 7
    Study of "tanh" ideal and lossy ELIN integrators

    Study of "tanh" ideal and lossy ELIN integrators by Bozomitu, R.G., Burdia, D., Cehan, V.

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  8. 8
    Some aspects on modeling and characterization of deep submicrometer CMOS gates driving lossless transmission lines

    Some aspects on modeling and characterization of deep submicrometer CMOS gates driving lossless transmission lines by Burdia, D., Bozomitu, R.-G., Comsa, C.-R.

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