Search Results - COAN, Tom

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  1. 1
    A 1.1 GHz 12 μA/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications

    A 1.1 GHz 12 μA/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications by YIH WANG, HONG JO AHN, LIN, Jie-Feng, NG, Yong-Gee, POST, Ian, LIQIONG WEI, YING ZHANG, ZHANG, Kevin, BOHR, Mark, BHATTACHARYA, Uddalak, ZHANPING CHEN, COAN, Tom, HAMZAOGLU, Fatih, HAFEZ, Walid M, JAN, Chia-Hong, KOLAR, Pramod, KULKARNI, Sarvesh H

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  2. 2
    Process, Temperature, and Supply-Noise Tolerant 45 ~nm Dense Cache Arrays With Diffusion-Notch-Free (DNF) 6T SRAM Cells and Dynamic Multi-Vcc Circuits

    Process, Temperature, and Supply-Noise Tolerant 45 ~nm Dense Cache Arrays With Diffusion-Notch-Free (DNF) 6T SRAM Cells and Dynamic Multi-Vcc Circuits by Khellah, M., Nam Sung Kim, Yibin Ye, Somasekhar, D., Karnik, T., Borkar, N., Pandya, G., Hamzaoglu, F., Coan, T., Yih Wang, Zhang, K., Webb, C., De, V.

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  3. 3
    PVT-variations and supply-noise tolerant 45nm dense cache arrays with Diffusion-Notch-Free (DNF) 6T SRAM cells and dynamic multi-Vcc circuits

    PVT-variations and supply-noise tolerant 45nm dense cache arrays with Diffusion-Notch-Free (DNF) 6T SRAM cells and dynamic multi-Vcc circuits by Khellah, M., Nam Sung Kim, Yibin Ye, Somasekhar, D., Karnik, T., Borkar, N., Hamzaoglu, F., Coan, T., Yih Wang, Kevin Zhang, Webb, C., Vivek De

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  4. 4
    WALTHAM CROSS

    WALTHAM CROSS by Coan, Tom

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  5. 5
    THE PINHOLE SOCIETY'S OUTING

    THE PINHOLE SOCIETY'S OUTING by Coan, Tom

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  6. 6
    MITES

    MITES by Coan, Tom

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  7. 7
    SOMERSET

    SOMERSET by Coan, Tom

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