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A 576 Mb DRAM with 16-channel 10.3125Gbps serial I/O and 14.5 ns latency
by
Vamvakos, S. D.
,
Kleveland, B.
,
Sikdar, D.
,
Ahuja, B. K.
,
Lin, H.
,
Balachandran, J.
,
Balakrishnan, W.
,
Bottelli, A.
,
Chen, J.
,
Chen, X.
,
Choi, J.
,
Chopra, R.
,
Dabral, S.
,
Dasari, K.
,
David, R.
,
Desai, S.
,
Gauthier, C.
,
Hassan, M.
,
Hsieh, K. C.
,
Canagasaby, R.
,
Kumala, J.
,
Kwon, E. P.
,
Lee, B.
,
Liu, M.
,
Mandal, G.
,
Mitra, S.
,
Na, B. C.
,
Panwar, S.
,
Patel, J.
,
Rao, C.
,
Rao, V.
,
Rouse, R.
,
Saraf, R.
,
Seshadri, S.
,
Sim, J.-K
,
Szeto, C.
,
Wang, A.
,
Yeung, J.
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Conference Proceeding
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A 2.488-11.2 Gb/s multi-protocol SerDes in 40nm low-leakage CMOS for FPGA applications
by
Vamvakos, S. D.
,
Gauthier, C. R.
,
Rao, Chethan
,
Canagasaby, K. R.
,
Choudhary, P.
,
Dabral, S.
,
Desai, S.
,
Hassan, M.
,
Hsieh, K. C.
,
Kleveland, B.
,
Mandal, G.
,
Rouse, R.
,
Saraf, R.
,
Wang, A.
,
Yeung, J.
,
Abugharbieh, K.
,
Ying Cao
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A 2.488–11.2 Gb/s SerDes in 40 nm low-leakage CMOS with multi-protocol compatibility for FPGA applications
by
Vamvakos, Socrates D.
,
Gauthier, Claude R.
,
Rao, Chethan
,
Wang, Alvin
,
Canagasaby, Karthisha Ramoshan
,
Abugharbieh, Khaldoon
,
Choudhary, Prashant
,
Dabral, Sanjay
,
Desai, Shaishav
,
Hassan, Mahmudul
,
Hsieh, K. C.
,
Kleveland, Bendik
,
Mandal, Gurupada
,
Rouse, Richard
,
Saraf, Ritesh
,
Yeung, Jason
,
Cao, Ying
Published in
Analog integrated circuits and signal processing
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A 20Gb/s Forwarded Clock Transceiver in 90nm CMOS B
by
Casper, B.
,
Jaussi, J.
,
O'Mahony, F.
,
Mansuri, M.
,
Canagasaby, K.
,
Kennedy, J.
,
Yeung, E.
,
Mooney, R.
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A 20Gb/s Embedded Clock Transceiver in 90nm CMOS
by
Mooney, R.
,
Kennedy, J.
,
Canagasaby, K.
,
Mansuri, M.
,
O'Mahony, F.
,
Jaussi, J.
,
Casper, B.
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