Application-level Validation of Accelerator Designs Using a Formal Software/Hardware Interface by Huang, Bo-Yuan, Lyubomirsky, Steven, Li, Yi, He, Mike, Smith, Gus Henry, Tambe, Thierry, Gaonkar, Akash, Canumalla, Vishal, Cheung, Andrew, Wei, Gu-Yeon, Gupta, Aarti, Tatlock, Zachary, Malik, Sharad

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FPGA Technology Mapping Using Sketch-Guided Program Synthesis by Smith, Gus Henry, Kushigian, Ben, Canumalla, Vishal, Cheung, Andrew, Lyubomirsky, Steven, Porncharoenwase, Sorawee, Just, René, Bernstein, Gilbert Louis, Tatlock, Zachary

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Generate Compilers from Hardware Models by Smith, Gus Henry, Kushigian, Ben, Canumalla, Vishal, Cheung, Andrew, Just, René, Tatlock, Zachary

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There and Back Again: A Netlist's Tale with Much Egraphin' by Smith, Gus Henry, Sisco, Zachary D, Techaumnuaiwit, Thanawat, Xia, Jingtao, Canumalla, Vishal, Cheung, Andrew, Tatlock, Zachary, Nandi, Chandrakana, Balkind, Jonathan

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Application-Level Validation of Accelerator Designs Using a Formal Software/Hardware Interface by Bo-Yuan, Huang, Lyubomirsky, Steven, Li, Yi, He, Mike, Smith, Gus Henry, Tambe, Thierry, Gaonkar, Akash, Canumalla, Vishal, Cheung, Andrew, Gu-Yeon, Wei, Gupta, Aarti, Tatlock, Zachary, Malik, Sharad

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