Impact of Aging Degradation on Heavy-Ion SEU Response of 28-nm UTBB FD-SOI Technology by Mounir Mahmoud, M., Prinzie, J., Soderstrom, D., Niskanen, K., Pouget, V., Cathelin, A., Clerc, S., Leroux, P.

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Terahertz electronics: Application of wave propagation and nonlinear processes by Aghasi, H., Naghavi, S. M. H., Tavakoli Taba, M., Aseeri, M. A., Cathelin, A., Afshari, E.

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Nanoscale CMOS Transceiver Design in the 90-170-GHz Range by Laskin, E., Khanpour, M., Nicolson, S.T., Tomkins, A., Garcia, P., Cathelin, A., Belot, D., Voinigescu, S.P.

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3D Electro-optical Simulations for Improving the Photon Detection Probability of SPAD Implemented in FD-SOI CMOS Technology by Gao, S., Issartel, D., Orobtchouk, R., Mandorlo, F., Golanski, D., Cathelin, A., Calmon, F.

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A Gm-C low-pass filter for zero-IF mobile applications with a very wide tuning range by CHAMLA, David, KAISER, Andreas, CATHELIN, Andreia, BELOT, Didier

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Broadband Sub-THz Chirp Linearization Using Particle Swarm Optimization for Precision Metrology Applications by Naghavi, S. M. H., Taba, M. Tavakoli, Yektakhah, B., Aseeri, M., Cathelin, A., Afshari, E.

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Body-biasing considerations with SPAD FDSOI: advantages and drawbacks by de Albuquerque, T. Chaves, Issartel, D., Clerc, R., Pittet, P., Cellier, R., Uhring, W., Cathelin, A., Calmon, F.

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A switchable-order Gm-C baseband filter with wide digital tuning for configurable radio receivers by CHAMLA, David, KAISER, Andreas, CATHELIN, Andreia, BELOT, Didier

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A 1 k-Pixel Video Camera for 0.7-1.1 Terahertz Imaging Applications in 65-nm CMOS by Al Hadi, R., Sherry, H., Grzyb, J., Yan Zhao, Forster, W., Keller, H. M., Cathelin, A., Kaiser, A., Pfeiffer, U. R.

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Architecture optimization of SPAD integrated in 28 nm FD-SOI CMOS technology to reduce the DCR by Issartel, D., Gao, S., Pittet, P., Cellier, R., Golanski, D., Cathelin, A., Calmon, F.

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A G/sub m/-C low-pass filter for zero-IF mobile applications with a very wide tuning range by Chamla, D., Kaiser, A., Cathelin, A., Belot, D.

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A FIR baseband filter for high data rate 60-GHz wireless communications by Muller, J, Cathelin, A, Niknejad, A, Kaiser, A

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Robust and Compact Quaternary Symbol Coding 3Cells/2Bits16MB Embedded PCM Solution in 28nm FD-SOI CMOS with Automotive Grade by Carissimi, M., Tomasoni, A., Ventre, A., Grasso, R., Perroni, M., Manfre, D., Torti, C., Molgora, A., Maurelli, A., Gandolfo, A., Cathelin, A., Bonfanti, A., Disegni, F.

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Improving the Photon Detection Probability of SPAD implemented in FD-SOI CMOS Technology with light-trapping concept by Gao, S., Issartel, D., Orobtchouk, R., Mandorlo, F., Golanski, D., Cathelin, A., Calmon, F.

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A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOI by Gomez, R. G., Bano, E., Cathelin, A., Clerc, S.

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A 10GHz Distributed Voltage Controlled Oscillator for WLAN Application in a VLSI 65nm CMOS Process by Seller, N., Cathelin, A., Lapuyade, H., Begueret, J.-B., Chataigner, E., Belot, D.

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3D sequential integration with Si CMOS stacked on 28nm industrial FDSOI with Cu-ULK iBEOL featuring RO and HDR pixel by Mota-Frutuoso, T., Lapras, V., Brunet, L., Basset, L., Lugo, J., Fenouillet-Beranger, C., Vinet, M., Lattard, D., Boulard, F., Exbraya, Y., Boutry, D., Billoint, O., Bosch, D., Maneglia, Y., Peizerat, A., Dumas, S., Sicard, G., Kerdiles, S., Kanyandekwe, J., Sideris, P., Mazzocchi, V., Sarrazin, A., Loup, V., Mauguen, G., Morales, C., Alba, P. Acosta, Balan, V., Perrot, C., Sturm, J., Euvrard, C., Aussenac, F., Janaud, A., Chapon, J-D., Guillermet, M., Guglieri, S., Bailly, F., Toresani, P., Fournel, F., Mouhdach, M., Berthoud, A., Chapelon, L-L., Ribotta, M., Ponthenier, F., Magalhaes, A., Maitrejean, S., Moulin, C., Michailos, J., Arnaud, F., Cathelin, A., Arcamone, J., Andrieu, F., Garros, X., Gaillard, F., Batude, P.

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A 1kpixel CMOS camera chip for 25fps real-time terahertz imaging applications by Sherry, H., Grzyb, J., Yan Zhao, Al Hadi, Richard, Cathelin, A., Kaiser, A., Pfeiffer, U.

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Avalanche Transient Simulations of SPAD integrated in 28nm FD-SOI CMOS Technology by Issartel, D., Gao, S., Hagen, S., Pittet, P., Cellier, R., Golanski, D., Cathelin, A., Calmon, F.

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SPAD FDSOI cell optimization for lower dark count rate achievement by Issartel, D., de Albuquerque, T. Chaves, Clerc, R., Pittet, P., Cellier, R., Golanski, D., Cathelin, A., Calmon, F.

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