Search Results - Chen, Yue-Chih

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  1. 1
    A sesquiterpene ester from Celastrus hindsii

    A sesquiterpene ester from Celastrus hindsii by Kuo, Yao-Haur, Chou, Cheng-Jen, Kuo, Li-Ming Yang, Hu, Yun-Yu, Chen, Yue-Chih, Chen, Chieh-Fu, Lee, Kuo-Hsiung

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  2. 2
    Pressure drop of TiO2 nanofluid in circular pipes

    Pressure drop of TiO2 nanofluid in circular pipes by Teng, Tun-Ping, Hung, Yi-Hsuan, Jwo, Ching-Song, Chen, Chien-Chih, Jeng, Lung-Yue

    Published in Particuology
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  3. 3
    Characterizing the lipid-lowering effects and antioxidant mechanisms of tomato [Lycopersicon esculentum] paste

    Characterizing the lipid-lowering effects and antioxidant mechanisms of tomato [Lycopersicon esculentum] paste by Hsu, Y.M.(China Medical Univ., Taichung (Taiwan)), Lai, C.H, Chang, C.Y, Fan, C.T, Chen, C.T, Wu, C.H

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  4. 4
    Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme

    Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme by Meng-Fan Chang, Chia-Chen Kuo, Shyh-Shyuan Sheu, Chorng-Jung Lin, Ya-Chin King, Chen, Frederick T., Tzu-Kun Ku, Ming-Jinn Tsai, Jui-Jen Wu, Yue-Der Chih

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  5. 5
    28-nm 2T High- K Metal Gate Embedded RRAM With Fully Compatible CMOS Logic Processes

    28-nm 2T High- K Metal Gate Embedded RRAM With Fully Compatible CMOS Logic Processes by Chin Yu Mei, Wen Chao Shen, Chun Hsiung Wu, Yue-Der Chih, Ya-Chin King, Chrong Jung Lin, Ming-Jinn Tsai, Kan-Hsueh Tsai, Chen, Frederick T.

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  6. 6
    A New 2T Contact Coupling Gate MTP Memory in Fully CMOS Compatible Process

    A New 2T Contact Coupling Gate MTP Memory in Fully CMOS Compatible Process by LIEN, Chiu-Wang, WU, Haw-Yun, TSAI, Cheng-Wei, HUANG, Chen-Mei, CHIH, Yue-Der, LEE, Te-Liang, CHRONG JUNG LIN

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  7. 7
    1-kb FinFET Dielectric Resistive Random Access Memory Array in 1\times nm CMOS Logic Technology for Embedded Nonvolatile Memory Applications

    1-kb FinFET Dielectric Resistive Random Access Memory Array in 1\times nm CMOS Logic Technology for Embedded Nonvolatile Memory Applications by Huang, Kai Ping, Pan, Hsin Wei, Chen, Shih Yu, Peng, Ping Chun, Kuo, Cheng-Hsiung, Chih, Yue-Der, Lin, Chrong Jung, King, Ya-Chin

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  8. 8
    A New Self-Powered Wireless Sensing Circuitry for On-Wafer In-Situ EUV Detection

    A New Self-Powered Wireless Sensing Circuitry for On-Wafer In-Situ EUV Detection by Lin, Wei-Hwa, Chen, Li Ci, Ho, Ming-Han, Chen, Hong-Shen, Hu, Yu-Lun, Lin, Burn Jeng, Wu, Pin-Jiun, Liu, Jenny Yi-Chun, Chih, Yue-Der, Chang, Jonathen, Shih, Jiaw-Ren, Lin, Chrong Jung, King, Ya-Chin

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  9. 9
    1Kbit FinFET Dielectric (FIND) RRAM in pure 16nm FinFET CMOS logic process

    1Kbit FinFET Dielectric (FIND) RRAM in pure 16nm FinFET CMOS logic process by Pan, Hsin Wei, Huang, Kai Ping, Chen, Shih Yu, Peng, Ping Chun, Yang, Zhi Sung, Kuo, Cheng-Hsiung, Chih, Yue-Der, King, Ya-Chin, Lin, Chrong Jung

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  10. 10
    Ultra high density 3D via RRAM in pure 28nm CMOS process

    Ultra high density 3D via RRAM in pure 28nm CMOS process by Min-Che Hsieh, Yu-Cheng Liao, Yung-Wen Chin, Chen-Hsin Lien, Tzong-Sheng Chang, Yue-Der Chih, Natarajan, Sreedhar, Ming-Jinn Tsai, Ya-Chin King, Chrong Jung Lin

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