Search Results - Cho, Woo-Suhl

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  1. 1
    The Effects of Direct Source-to-Drain Tunneling and Variation in the Body Thickness on (100) and (110) Sub-10-nm Si Double-Gate Transistors

    The Effects of Direct Source-to-Drain Tunneling and Variation in the Body Thickness on (100) and (110) Sub-10-nm Si Double-Gate Transistors by Woo-Suhl Cho, Roy, Kaushik

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  2. 2
    Device-Circuit Cosimulation for Energy Efficiency in Sub-10-nm Gate Length Logic and Memory

    Device-Circuit Cosimulation for Energy Efficiency in Sub-10-nm Gate Length Logic and Memory by Cho, Woo-Suhl, Roy, Kaushik

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  3. 3
    Device-Circuit Analysis of Double-Gate MOSFETs and Schottky-Barrier FETs: A Comparison Study for Sub-10-nm Technologies

    Device-Circuit Analysis of Double-Gate MOSFETs and Schottky-Barrier FETs: A Comparison Study for Sub-10-nm Technologies by Woo-Suhl Cho, Gupta, Sumeet Kumar, Roy, Kaushik

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  4. 4
    Leakage reduction in stacked sub-10nm double-gate MOSFETs

    Leakage reduction in stacked sub-10nm double-gate MOSFETs by Woo-Suhl Cho, Roy, Kaushik

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  5. 5
    Design space exploration of FinFETs in sub-10nm technologies for energy-efficient near-threshold circuits

    Design space exploration of FinFETs in sub-10nm technologies for energy-efficient near-threshold circuits by Gupta, Sumeet Kumar, Woo-Suhl Cho, Goud, A. Arun, Yogendra, Karthik, Roy, Kaushik

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  6. 6
    Full band atomistic modeling of homo-junction InGaAs band-to-band tunneling diodes including band gap narrowing

    Full band atomistic modeling of homo-junction InGaAs band-to-band tunneling diodes including band gap narrowing by Cho, Woo-Suhl, Luisier, Mathieu, Mohata, Dheeraj, Datta, Suman, Pawlik, David, Rommel, Sean L., Klimeck, Gerhard

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