Search Results - Chotin-Avot, R.

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  1. 1
    Improved method for parallel AES-GCM cores using FPGAs

    Improved method for parallel AES-GCM cores using FPGAs by Abdellatif, Karim M., Chotin-Avot, R., Mehrez, H.

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  2. 2
    Lightweight and compact solutions for secure reconfiguration of FPGAs

    Lightweight and compact solutions for secure reconfiguration of FPGAs by Abdellatif, Karim M., Chotin-Avot, R., Mehrez, H.

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  3. 3
    High speed authenticated encryption for slow changing key applications using reconfigurable devices

    High speed authenticated encryption for slow changing key applications using reconfigurable devices by Abdellatif, Karim M., Chotin-Avot, R., Mehrez, H.

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  4. 4
    Hardware Implementation of Discrete Stochastic Arithmetic

    Hardware Implementation of Discrete Stochastic Arithmetic by Avot-Chotin, Roselyne, Mehrez, Habib

    Published in Numerical algorithms
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  5. 5
    Design and FPGA implementation of modular multiplication methods using cellular automata

    Design and FPGA implementation of modular multiplication methods using cellular automata by Guitouni, Z, Chotin-Avot, R, Machhout, M, Mehrez, H, Tourki, R

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  6. 6
    Efficient AES-GCM for VPNs using FPGAs

    Efficient AES-GCM for VPNs using FPGAs by Abdellatif, Karim M., Chotin-Avot, R., Mehrez, H.

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  7. 7
    Mapping an obstacles detection, stereo vision-based, software application on a multi-processor system-on-chip

    Mapping an obstacles detection, stereo vision-based, software application on a multi-processor system-on-chip by Greiner, A., Petrot, F., Carrier, M., Benabdenbi, M., Chotin-Avot, R., Labayrade, R.

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  8. 8
    Protecting FPGA bitstreams using authenticated encryption

    Protecting FPGA bitstreams using authenticated encryption by Abdellatif, Karim M., Chotin-Avot, R., Mehrez, H.

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  9. 9
    Efficient parallel-pipelined GHASH for message authentication

    Efficient parallel-pipelined GHASH for message authentication by Abdellatif, K. M., Chotin-Avot, R., Mehrez, H.

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  10. 10
    Stratus: Free design of highly parametrized VLSI modules interoperable with commercial tools

    Stratus: Free design of highly parametrized VLSI modules interoperable with commercial tools by Belloeil-Dupuis, S, Chotin-Avot, R, Mehrez, H

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  11. 11
    Arithmetic Data Path Optimization Using Borrow-Save Representation

    Arithmetic Data Path Optimization Using Borrow-Save Representation by Belloeil, S., Chotin-Avot, R., Mehrez, H.

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  12. 12
    Impact of defect tolerance techniques on the criticality of a SRAM-based mesh of cluster FPGA

    Impact of defect tolerance techniques on the criticality of a SRAM-based mesh of cluster FPGA by Blanchardon, Adrien, Chotin-Avot, Roselyne, Mehrez, Habib, Amouri, Emna

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  13. 13
    Efficient multilevel interconnect topology for cluster-based mesh FPGA architecture

    Efficient multilevel interconnect topology for cluster-based mesh FPGA architecture by Amouri, Emna, Blanchardon, Adrien, Chotin-Avot, Roselyne, Mehrez, Habib, Marrakchi, Zied

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