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  1. 141
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    Benchmarking GPUs to tune dense linear algebra by Volkov, Vasily, Demmel, James W.


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  2. 142
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    Bandwidth intensive 3-D FFT kernel for GPUs using CUDA by Nukada, Akira, Ogata, Yasuhiko, Endo, Toshio, Matsuoka, Satoshi


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  3. 143
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    Using reconfigurable logic to optimise GPU memory accesses by Cope, Ben, Cheung, Peter Y. K., Luk, Wayne


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  4. 144
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    Adapting a message-driven parallel application to GPU-accelerated clusters by Phillips, James C., Stone, John E., Schulten, Klaus


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  5. 145
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    A design case study: CPU vs. GPGPU vs. FPGA by Rosenband, Daniel L., Rosenband, Till


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  6. 146
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    Decomposing image computation for symbolic reachability analysis using control flow information by Ward, David, Somenzi, Fabio



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  7. 147
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    Advanced visualization technology for terascale particle accelerator simulations by Ma, Kwan-Liu, Schussman, Greg, Wilson, Brett, Ko, Kwok, Qiang, Ji, Ryne, Robert


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  8. 148
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    General-purpose GPU computing: practice and experience by Michel, Bartlett S. H. (Scott)


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  9. 149
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    A smart imager for the vision processing front-END by Takeda, Noriaki, Homma, Mituru, Nagata, Makoto, Morie, Takashi, Iwata, Atsushi


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  10. 150
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    A Run-Time Reconfigurable Datapath Architecture for Image Processing Applications by Boschetti, Marcos R., Silva, Ivan S., Bampi, Sergio


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  11. 151
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    The Compositional Far Side of Image Computation by Wang, Chao, Hachtel, Gary D., Somenzi, Fabio



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  12. 152
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    GAN Dissection and Datacenter RPCs: Visualizing and understanding generative adversarial networks; datacenter RPCs can be general and fast by Colyer, Adrian

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  13. 153
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    Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU by Breternitz, Mauricio, Hum, Herbert, Kumar, Sanjeev


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  14. 154
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    4D volume rendering with the Shear Warp factorisation by Anagnostou, Kostas, Atherton, Tim J., Waterfall, Andrew E.


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  15. 155
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    A real-time volume rendering architecture using an adaptive resampling scheme for parallel and perspective projections by Ogata, Masato, Ohkami, TakaHide, Lauer, Hugh C., Pfister, Hanspeter


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  16. 156
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    Architecture of a graphics processor (abstract) by Singh, Gautam B.


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  17. 157
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    Fast isocontouring for improved interactivity by Bajaj, Chandrajit L., Pascucci, Valerio, Schikore, Daniel R.


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  18. 158
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    Cube-4-a scalable architecture for real-time volume rendering by Pfister, Hanspeter, Kaufman, Arie


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  19. 159
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    The user interface and program structure of a graphical VLSI layout editor by Szabo, Kevin S B, Elmasry, Mohamed I



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  20. 160
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    A VHDL SGRGAM model for the validation environment of a high performance graphic processor by Wahl, M. G., Völkel, H.


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