Search Results - Díaz-Madrid, José Ángel

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  1. 1
    An all‐hardware implementation of the subpixel refinement stage in SIFT algorithm

    An all‐hardware implementation of the subpixel refinement stage in SIFT algorithm by Rubio‐Ibáñez, Pablo, Ruiz‐Merino, Ramón, Doménech‐Asensi, Ginés, Martínez‐Álvarez, José Javier, Zapata‐Pérez, Juan, Díaz‐Madrid, José Ángel, López‐Alcantud, José Alejandro

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  2. 2
    Low power 9-bit 500 kS/s 2-stage cyclic ADC using OTA variable bias current

    Low power 9-bit 500 kS/s 2-stage cyclic ADC using OTA variable bias current by Díaz-Madrid, José Ángel, Doménech-Asensi, Ginés, Ruiz-Merino, Ramón, Zapata, Juan, Martínez, José Javier

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  3. 3
    All-hardware SIFT implementation for real-time VGA images feature extraction

    All-hardware SIFT implementation for real-time VGA images feature extraction by Doménech-Asensi, Ginés, Zapata-Pérez, Juan, Ruiz-Merino, Ramón, López-Alcantud, José Alejandro, Díaz-Madrid, José Ángel, Brea, Víctor Manuel, López, Paula

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  4. 4
    A Stimulator of the Salivary Excretion Based on Physical Vibration of the Parotid Glands

    A Stimulator of the Salivary Excretion Based on Physical Vibration of the Parotid Glands by Gómez-García, Francisco, Diaz-Madrid, José-Ángel, López-Jornet, Pía, Guirao, Juan L.G., Guerrero-Sánchez, Yolanda

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  5. 5
    A low kickback fully differential dynamic comparator for pipeline analog‐to‐digital converters

    A low kickback fully differential dynamic comparator for pipeline analog‐to‐digital converters by Diaz‐Madrid, Jose‐Angel, Domenech‐Asensi, Gines, Hauer, Johann, Mateu, Loreto

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  6. 6
    Accurate and reusable macromodeling technique using a fuzzy-logic approach

    Accurate and reusable macromodeling technique using a fuzzy-logic approach by Domenech-Asensi, Gines, Hinojosa, Juan, Ruiz, Ramon, Diaz-Madrid, Jose Angel

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  7. 7
    A reconfigurable two-stage cyclic ADC for low-power applications in 3.3 V 0.35 µm CMOS

    A reconfigurable two-stage cyclic ADC for low-power applications in 3.3 V 0.35 µm CMOS by Díaz-Madrid, José Angel, Doménech-Asensi, Ginés, Oberst, Matthias

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  8. 8
    Evaluation of VHDL-AMS models of a high performance ADC

    Evaluation of VHDL-AMS models of a high performance ADC by Domenech-Asensi, G., Ruiz-Merino, R., Diaz Madrid, J.-A., Neubauer, H.

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  9. 9
    Low-Frequency CMOS Bandpass Filter for PIR Sensors in Wireless Sensor Nodes

    Low-Frequency CMOS Bandpass Filter for PIR Sensors in Wireless Sensor Nodes by Domenech-Asensi, Gines, Carrillo-Calleja, Juan Manuel, Illade-Quinteiro, Julio, Martinez-Viviente, Felix, Diaz-Madrid, Jose Angel, Fernandez-Luque, Francisco, Zapata-Perez, Juan, Ruiz-Merino, Ramon, Dominguez, Miguel Angel

    Published in IEEE sensors journal
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  10. 10
    Comparative analysis of two operational amplifier topologies for a 40MS/s 12-bit pipelined ADC in 0.35μm CMOS

    Comparative analysis of two operational amplifier topologies for a 40MS/s 12-bit pipelined ADC in 0.35μm CMOS by Diaz-Madrid, J.-A., Neubauer, H., Domenech-Asensi, G., Ruiz, R.

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  11. 11
    A real-time and energy-efficient SRAM with mixed-signal in-memory computing near CMOS sensors

    A real-time and energy-efficient SRAM with mixed-signal in-memory computing near CMOS sensors by Diaz-Madrid, Jose-Angel, Domenech-Asensi, Gines, Ruiz-Merino, Ramon, Zapata-Perez, Juan-Francisco

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  12. 12
    A reconfigurable two-stage cyclic ADC for low-power applications in 3.3 V 0.35 mu m CMOS

    A reconfigurable two-stage cyclic ADC for low-power applications in 3.3 V 0.35 mu m CMOS by Diaz-Madrid, Jose Angel, Domenech-Asensi, Gines, Oberst, Matthias

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