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Simulation of intrinsic bipolar transistor mechanisms for future capacitor-less eDRAM on bulk substrate
by
Pulicani, R
,
Goducheau, O
,
Degoirat, H
,
Aziza, H
,
Pérez, A
,
Bergeret, E
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32nm Embedded DRAM Reaching 400MHz and 0.1mm²/Mb on a Low Cost and Low Power Process
by
Vernet, M
,
Jeantet, O
,
Parashar, A
,
Degoirat, H
,
Verma, P K
,
Yadav, S K
,
Chawla, K
,
Atif, M
,
Handa, T
,
Sharad, S
,
Penaka, G P
,
Kundu, R
,
Nantet, S
,
Cremer, S
,
Goducheau, O
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Capacitors
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Random Access Memory
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1T-Dram
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Capacitor-Less Edram
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Computer Architecture
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Insulators
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Logic Gates
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Macrocell Networks
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Ieee Electronic Library (Iel) Conference Proceedings
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