Search Results - Devanathan, V.R.

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  1. 1
    Glitch-Aware Pattern Generation and Optimization Framework for Power-Safe Scan Test

    Glitch-Aware Pattern Generation and Optimization Framework for Power-Safe Scan Test by Devanathan, V.R., Ravikumar, C.P., Kamakoti, V.

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  2. 2
    A stochastic pattern generation and optimization framework for variation-tolerant, power-safe scan test

    A stochastic pattern generation and optimization framework for variation-tolerant, power-safe scan test by Devanathan, V.R., Ravikumar, C.P., Kamakoti, V.

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  3. 3
    On Power-profiling and Pattern Generation for Power-safe Scan Tests

    On Power-profiling and Pattern Generation for Power-safe Scan Tests by Devanathan, V.R., Ravikumar, C.P., Kamakoti, V.

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  4. 4
    PMScan : A power-managed scan for simultaneous reduction of dynamic and leakage power during scan test

    PMScan : A power-managed scan for simultaneous reduction of dynamic and leakage power during scan test by Devanathan, V.R., Ravikumar, C.P., Mehrotra, R., Kamakoti, V.

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  5. 5
    EOMP: an exactly once multicast protocol for distributed mobile systems

    EOMP: an exactly once multicast protocol for distributed mobile systems by Mohamed, M.A. Maluk, Devanathan, V.R., Janakiram, D.

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  6. 6
    Variation-Tolerant, Power-Safe Pattern Generation

    Variation-Tolerant, Power-Safe Pattern Generation by Devanathan, V.R., Ravikumar, C.P., Kamakoti, V.

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  7. 7
    Reducing SoC Test Time and Test Power in Hierarchical Scan Test : Scan Architecture and Algorithms

    Reducing SoC Test Time and Test Power in Hierarchical Scan Test : Scan Architecture and Algorithms by Devanathan, V.R., Ravikumar, C.P., Kamakoti, V.

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  8. 8
    Novel Bi-partitioned Scan Architecture to Improve Transition Fault Coverage

    Novel Bi-partitioned Scan Architecture to Improve Transition Fault Coverage by Devanathan, V.R.

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  9. 9
    A framework for distributed and hierarchical design-for-test

    A framework for distributed and hierarchical design-for-test by Ravikumar, C.P., Dandamudi, R., Devanathan, V.R., Haldar, N., Kiran, K., Kumar, V.

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  10. 10
    Methodology for low power test pattern generation using activity threshold control logic

    Methodology for low power test pattern generation using activity threshold control logic by Ravi, S., Devanathan, V.R., Parekhji, R.

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  11. 11
    A framework for concurrency control in real-time distributed collaboration for mobile systems

    A framework for concurrency control in real-time distributed collaboration for mobile systems by Ram, D.J., Mohamed, M.A.M., Devanathan, V.R.

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