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A parameterised genetic algorithm IP core: FPGA design, implementation and performance evaluation
by
Deliparaschos, K. M.
,
Doyamis, G. C.
,
Tzafestas, S. G.
Published in
International journal of electronics
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International Journal Of Electronics
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Applied Sciences
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Circuit Properties
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Design. Technologies. Operation Analysis. Testing
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Digital Circuits
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Field Programmable Gate Array Chip
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Genetic Algorithm
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Integrated Circuits
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Intellectual Property Core
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Semiconductor Electronics. Microelectronics. Optoelectronics. Solid State Devices
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Travelling Salesman Problem
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Very High-Speed Integrated-Circuits Description Language
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Taylor And Francis:jisc Collections:taylor And Francis Read And Publish Agreement 2024-2025:Science And Technology Collection (Reading List)
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