Search Results - Dun-Shan Yu

  • Showing 1 - 11 results of 11
Refine Results
  1. 1
    A novel NAND Flash memory controller compatible with asynchronous and source synchronous data types

    A novel NAND Flash memory controller compatible with asynchronous and source synchronous data types by Peng Qiang, Jian Cao, Xing Zhang, Dun-Shan Yu

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  2. 2
    Low power adiabatic logic based on FinFETs

    Low power adiabatic logic based on FinFETs by Liao, Nan, Cui, XiaoXin, Liao, Kai, Ma, KaiSheng, Wu, Di, Wei, Wei, Li, Rui, Yu, DunShan

    Get full text
    Items that this one cites
    Items that cite this one
    Article
    Save to List
    Saved in:
  3. 3
    Key characterization factors of accurate power modeling for FinFET circuits

    Key characterization factors of accurate power modeling for FinFET circuits by Ma, KaiSheng, Cui, XiaoXin, Liao, Kai, Liao, Nan, Wu, Di, Yu, DunShan

    Get full text
    Items that this one cites
    Items that cite this one
    Article
    Save to List
    Saved in:
  4. 4
    Ultra-low power dissipation of improved complementary pass-transistor adiabatic logic circuits based on FinFETs

    Ultra-low power dissipation of improved complementary pass-transistor adiabatic logic circuits based on FinFETs by Liao, Kai, Cui, XiaoXin, Liao, Nan, Ma, KaiSheng, Wu, Di, Wei, Wei, Li, Rui, Yu, DunShan

    Get full text
    Items that this one cites
    Items that cite this one
    Article
    Save to List
    Saved in:
  5. 5
    Efficient VLSI Design and Implementation of Integer Motion Estimation for H.264 SDTV Encoder

    Efficient VLSI Design and Implementation of Integer Motion Estimation for H.264 SDTV Encoder by Chun-Gan Peng, Dun-Shan Yu, Xi-Xin Cao, Shi-Min Sheng

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  6. 6
    A High Performance and Low Power Hardware Architecture of Entropy Coder for H.264/AVC Baseline

    A High Performance and Low Power Hardware Architecture of Entropy Coder for H.264/AVC Baseline by Wei-Jun Lu, Xi-Xin Cao, Dun-Shan Yu, Shi-Min Sheng

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  7. 7
    A method to lower power in speed negotiation algorithm of fiber channel

    A method to lower power in speed negotiation algorithm of fiber channel by Jie Jin, Dun Shan, Xiao Xin Cui

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  8. 8
    Power and time efficient clock synchronization in Fiber Channel

    Power and time efficient clock synchronization in Fiber Channel by Jie Jin, DunShan Yu

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  9. 9
    Two functionally interchangeable Vps9 isoforms mediate pollen tube penetration of style

    Two functionally interchangeable Vps9 isoforms mediate pollen tube penetration of style by Hao, Guang‐Jiu, Ying, Jun, Li, Lu‐Shen, Yu, Fei, Dun, Shan‐Shan, Su, Le‐Yan, Zhao, Xin‐Ying, Li, Sha, Zhang, Yan

    Published in The New phytologist
    Get full text
    Items that this one cites
    Article
    Save to List
    Saved in:
  10. 10
    Vlsi implementation of an entropy encoder for H.264/AVC baseline

    Vlsi implementation of an entropy encoder for H.264/AVC baseline by WeiJun Lu, Ying Li, DunShan Yu, Xing Zhang

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  11. 11
    A high effective algorithm of 32-bit multiply and MAC instructions' VLSI implementation with 32/spl times/8 multiplier-accumulator in DSP applications

    A high effective algorithm of 32-bit multiply and MAC instructions' VLSI implementation with 32/spl times/8 multiplier-accumulator in DSP applications by Ze Tian, Dun-shan Yu, Yu-lin Qiu

    Request full text
    Conference Proceeding
    Save to List
    Saved in:

Search Tools: