Search Results - Ekanadham, K.

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  1. 1
    Incorporating Data Flow Ideas into von Neumann Processors for Parallel Execution

    Incorporating Data Flow Ideas into von Neumann Processors for Parallel Execution by Buehrer, Richard, Ekanadham, Kattamuri

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  2. 2
    Accuracy and speed-up of parallel trace-driven architectural simulation

    Accuracy and speed-up of parallel trace-driven architectural simulation by Nguyen, A.-T., Bose, P., Ekanadham, K., Nanda, A., Michael, M.

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  3. 3
    Some new transitions in hierarchical level structures

    Some new transitions in hierarchical level structures by Ekanadham, K., Bernstein, A. J.

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  4. 4
    Conditional Capabilities

    Conditional Capabilities by Ekanadham, K., Bernstein, A.J.

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  5. 5
    PRISM: an integrated architecture for scalable shared memory

    PRISM: an integrated architecture for scalable shared memory by Ekanadham, K., Beng-Hong Lim, Pattnaik, P., Snir, M.

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  6. 6
    Some constraints and tradeoffs in the design of network communications

    Some constraints and tradeoffs in the design of network communications by Akkoyunlu, E. A., Ekanadham, K., Huber, R. V.

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  7. 7
    Portrayal of parallel applications for performance evaluation and prediction

    Portrayal of parallel applications for performance evaluation and prediction by Ekanadham, K., Naik, V.K.

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  8. 8
    The Speculative Prefetcher and Evaluator Processor for Pipelined Memory Hierarchies

    The Speculative Prefetcher and Evaluator Processor for Pipelined Memory Hierarchies by Bilardi, G., Ekanadham, K., Pattnaik, P.

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  9. 9
    SIGMA: A Simulator Infrastructure to Guide Memory Analysis

    SIGMA: A Simulator Infrastructure to Guide Memory Analysis by DeRose, L., Ekanadham, K., Hollingsworth, J.K., Sbaraglia, S.

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  10. 10
    Using Dynamic Tracing Sampling to Measure Long Running Programs

    Using Dynamic Tracing Sampling to Measure Long Running Programs by Odom, Jeffrey, Hollingsworth, Jeffrey K., DeRose, Luiz, Ekanadham, Kattamuri, Sbaraglia, Simone

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  11. 11
    An address dependence model of computation for hierarchical memories with pipelined transfer

    An address dependence model of computation for hierarchical memories with pipelined transfer by Bilardi, G., Ekanadham, K., Pattnaik, P.

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  12. 12
    EMPS: an environment for memory performance studies

    EMPS: an environment for memory performance studies by Hollingsworth, J.K., Snavely, A., Sbaraglia, S., Ekanadham, K.

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  13. 13
    Pipelined memory hierarchies: scalable organizations and application performance

    Pipelined memory hierarchies: scalable organizations and application performance by Bilardi, Ekanadham, Pattnaik

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  14. 14
    SIGMA: a simulator infrastructure to guide memory analysis

    SIGMA: a simulator infrastructure to guide memory analysis by DeRose, Luiz, Ekanadham, K., Hollingsworth, Jeffrey K., Sbaraglia, Simone

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  15. 15
    Lazy home migration for distributed shared memory systems

    Lazy home migration for distributed shared memory systems by Baylor, S., Ekanadham, K., Jann, J., Beng-Hong Lim, Pattnaik, P.

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