Detailed Simulation Study of a Reverse Embedded-SiGe Strained-Silicon MOSFET by Fiorenza, J.G., Ji-Soo Park, Lochtefeld, A.

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Experimental comparison of RF power LDMOSFETs on thin-film SOI and bulk silicon by Fiorenza, J.G., del Alamo, J.A.

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Growth and characterization of GaAs layers on polished Ge/Si by selective aspect ratio trapping by Li, J.Z., Bai, J., Hydrick, J.M., Park, J.S., Major, C., Carroll, M., Fiorenza, J.G., Lochtefeld, A.

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Strained Si on insulator technology: from materials to devices by Langdo, T.A, Currie, M.T, Cheng, Z.-Y, Fiorenza, J.G, Erdtmann, M, Braithwaite, G, Leitz, C.W, Vineis, C.J, Carlin, J.A, Lochtefeld, A, Bulsara, M.T, Lauer, I, Antoniadis, D.A, Somerville, M

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Impact of substrate-surface potential on the performance of RF power LDMOSFETs on high-resistivity SOI by Scholvin, J., Fiorenza, J.G., del Alamo, J.A.

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RF power LDMOSFET on SOI by Fiorenza, J.G., Antoniadis, D.A., del Alamo, J.A.

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A metal/polysilicon damascene gate technology for RF power LDMOSFETs by Fiorenza, J.G., Scholvin, J., del Alamo, J.A.

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Fully depleted n-MOSFETs on supercritical thickness strained SOI by Lauer, I., Langdo, T.A., Cheng, Z.-Y., Fiorenza, J.G., Braithwaite, G., Currie, M.T., Leitz, C.W., Lochtefeld, A., Badawi, H., Bulsara, M.T., Somerville, M., Antoniadis, D.A.

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RF power performance of an LDMOSFET on high-resistivity SOI by Fiorenza, J.G., del Alamo, J.A.

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RF power performance of an LDMOSFET on high-resistivity SOI by Fiorenza, J.G, del Alamo, J.A

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Indium gallium arsenide on silicon interband tunnel diodes for NDR-based memory and steep subthreshold slope transistor applications by Pawlik, D.J., Thomas, P., Barth, M., Johnson, K., Rommel, S.L., Mookerjea, S., Datta, S., Luisier, M., Klimeck, G., Cheng, Z., Li, J., Park, J.S., Hydrick, J.M., Fiorenza, J.G., Lochtefeld, A.

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RF power performance of LDMOSFETs on SOI: an experimental comparison with bulk Si LDMOSFETs by Fiorenza, J.G., del Alamo, J.A.

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A RF power LDMOS device on SOI by Fiorenza, J.G., Del Alamo, J.A., Antoniadis, D.A.

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The impact of substrate surface potential on the performance of RF power LDMOSFETs on high-resistivity SOI by Scholvin, J., Fiorenza, J.G., del Alamo, J.A.

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Sub-micron Esaki Tunnel Diode fabrication and characterization by Pawlik, D.J., Romanczyk, B., Freeman, E., Thomas, P.M., Barth, M., Rommel, S.L., Cheng, Z., Li, J., Park, J.S., Hydrick, J.M., Fiorenza, J.G., Lochtefeld, A.

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Fabrication technique for arrays of Germanium-on-Nothing nanowires by Thomas, P.M., Pawlik, D.J., Romanczyk, B., Freeman, E., Rommel, S.L., Kurinec, S.K., Cheng, Z., Li, J., Park, J.S., Hydrick, J.M., Fiorenza, J.G., Lochtefeld, A.

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Record PVCR GaAs-based tunnel diodes fabricated on Si substrates using aspect ratio trapping by Rommel, S.L., Pawlik, D., Thomas, P., Barth, M., Johnson, K., Kurinec, S.K., Seabaugh, A., Cheng, Z., Li, J.Z., Park, J.S., Hydrick, J.M., Bai, J., Carroll, M., Fiorenza, J.G., Lochtefeld, A.

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Technologies for RF power LDMOSFETs beyond 2 GHz: metal/poly-Si damascene gates and low-loss substrates by Fiorenza, J.G., Scholvin, J., del Alamo, J.A.

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Systematic Study of Thick Strained Silicon NMOSFETs for Digital Applications by Fiorenza, J.G., Kohli, P., Kang, S.J., Erdtmann, M., Curtin, M., Bengston, S., Matthews, K., Nguyen, B., Kim, I.K., Yuk, H.S., Lee, D.K., Lee, B.Y., Lochtefeld, A., Wise, R.

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DC and RF characterization of fully depleted strained SOI MOSFETs by Chen, C.L., Langdo, T.A., Chen, C.K., Fiorenza, J.G., Wyatt, P.W., Currie, M.T., Leitz, C.W., Braithwaite, G., Fritze, M., Lambert, R., Yost, D.-R., Cheng, Z., Lochtefeld, A., Keast, C.K.

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