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A 62 Gb/s backplane interconnect ASIC based on 3.1 Gb/s serial-link technology
by
Landman, Paul
,
Yee, Ah-Lyan
,
Gu, Richard
,
Parthasarathy, Bharadwaj
,
Gupta, Vikas
,
Ramaswamy, Sridhar
,
Dyson, Lisa
,
Bosshart, Pat
,
Reynolds, Jeffrey
,
Frannhagen, Mats
,
Fremrot, Per
,
Johansson, Stefan
,
Lewis, Keith
,
Lee, Wai
Published in
Digest of technical papers - IEEE International Solid-State Circuits Conference
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Digest Of Technical Papers - Ieee International Solid-State Circuits Conference
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