Roadmap Differentiation and Emerging Trends in BCD Technology by Contiero, C., Andreini, A., Galbiati, P.

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A novel 0.16 μm - 300 V SOIBCD for ultrasound medical applications by Sambi, M., Merlini, D., Galbiati, P., Bonera, E., Belletti, F.

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Automatic and continuous offset compensation of MOS operational amplifiers using floating-gate transistors by Lanzoni, M., Tondi, G., Galbiati, P., Ricco, B.

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0.18 μm BCD -High Voltage Gate (HVG) Process to address Advanced Display Drivers Roadmap by Annese, M., Bertaiola, S., Croce, G., Milani, A., Roggero, R., Galbiati, P., Contiero, C.

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Smart power approaches VLSI complexity by Contiero, C., Galbiati, P., Palmieri, M., Ricotti, G., Stella, R.

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A new integrated silicon gate technology combining bipolar linear, CMOS logic, and DMOS power parts by Andreini, A., Contiero, C., Galbiati, P.

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190V N-channel lateral IGBT integration in SOI 0.35 µm BCD technology by Sambi, M., Gallo, M., Galbiati, P.

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BCD8 from 7V to 70V: a new 0.l8μm Technology Platform to Address the Evolution of Applications towards Smart Power ICs with High Logic Contents by Riccardi, D., Causio, A., Filippi, I., Paleari, A., Pregnolato, L.V.A., Galbiati, P., Contiero, C.

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Extraction of channel doping profile in DMOS transistors by Pieracci, A., Lanzoni, M., Galbiati, P., Manzini, S., Contiero, C., Ricco, B.

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LDMOS implementation in a 0.35 /spl mu/m BCD technology (BCD6) by Moscatelli, A., Merlini, A., Croce, G., Galbiati, P., Contiero, C.

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Via first approach optimisation for Through Silicon Via applications by Laviron, C., Dunne, B., Lapras, V., Galbiati, P., Henry, D., Toia, F., Moreau, S., Anciant, R., Brunet-Manquat, C., Sillon, N.

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LDMOS and VDMOS Electrical Characteristics in Multipower-BCD Technology: Modeling and Layout Optimization by Galbiati, P.

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Non-Volatile EEPROM Cells for Analog Circuit Calibration by Lanzoni, M., Tondi, G., Galbiati, P., Ricco, B.

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A 12V complementary RF LDMOS technology developed on a 0.18μm CMOS platform by MOSCATELLI, A, CONTIERO, C, GALBIATI, P, RAFFAGLIO, C

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LDMOS implementation by large tilt implant in 0.6 /spl mu/m BCD5 process, flash memory compatible by Contiero, C., Galbiati, P., Palmieri, M., Vecchi, L.

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Multipower BCD 250V: A Versatile Technology to Realize High Performance PICs by Andreini, A., Contiero, C., Galbiati, P.

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LDMOS implementation in a 0.35 μm BVD technology (BCD6) by MOSCATELLI, A, MERLINI, A, CROCE, G, GALBIATI, P, CONTIERO, C

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Characteristics and applications of a 0.6 /spl mu/m bipolar-CMOS-DMOS technology combining VLSI non-volatile memories by Contiero, C., Galbiati, P., Palmieri, M., Vecchi, L.

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Translational imaging of the fibroblast activation protein (FAP) using the new ligand [68Ga]Ga-OncoFAP-DOTAGA by Backhaus, P., Gierse, F., Burg, M. C., Büther, F., Asmus, I., Dorten, P., Cufe, J., Roll, W., Neri, D., Cazzamalli, S., Millul, J., Mock, J., Galbiati, A., Zana, A., Schäfers, K. P., Hermann, S., Weckesser, M., Tio, J., Wagner, S., Breyholz, H.-J., Schäfers, M.

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Trends and Issues in BCD Smart Power Technologies by Contiero, C., Galbiati, P., Merlini, A., Moscatelli, A., Tampellini, F., Vecchi, L.

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