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Search Results - Gealow, J.C.
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A pixel-parallel image processor using logic pitch-matched to dynamic memory
by
Gealow, J.C.
,
Sodini, C.G.
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IEEE journal of solid-state circuits
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System design for pixel-parallel image processing
by
Gealow, J.C.
,
Herrmann, F.P.
,
Hsu, L.T.
,
Sodini, C.G.
Published in
IEEE transactions on very large scale integration (VLSI) systems
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Integrated memory/logic architecture for image processing
by
Sodini, C.G.
,
Gealow, J.C.
,
Talib, Z.A.
,
Masaki, I.
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Massively parallel image processing system for intelligent transportation system applications
by
Talib, Z.A.
,
Love, N.S.
,
Gealow, J.C.
,
Hall, G.
,
Masaki, I.
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Sodini, C.G.
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