Search Results - Gieser, Horst A.

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  1. 1
    Identification of Soft Failure Mechanisms Triggered by ESD Stress on a Powered USB 3.0 Interface

    Identification of Soft Failure Mechanisms Triggered by ESD Stress on a Powered USB 3.0 Interface by Koch, Sebastian, Orr, Benjamin J., Gossner, Harald, Gieser, Horst A., Maurer, Linus

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  2. 2
    On-chip electrostatic discharge ESD

    On-chip electrostatic discharge ESD by Gieser, Horst A.

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  3. 3
    Survey on Very Fast TLP and Ultra Fast Repetitive Pulsing for Characterization in the CDM-Domain

    Survey on Very Fast TLP and Ultra Fast Repetitive Pulsing for Characterization in the CDM-Domain by Gieser, H.A., Wolf, H.

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  4. 4
    Stress Current Slew Rate Sensitivity of an Ultra-High-Speed Interface IC

    Stress Current Slew Rate Sensitivity of an Ultra-High-Speed Interface IC by Weber, Johannes, Fung, Rita, Wong, Richard, Wolf, Heinrich, Gieser, Horst A., Maurer, Linus

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  5. 5
    Analysis of Piezoresistive Silicon as Sense Element for use in Flexible Tactile Sensors

    Analysis of Piezoresistive Silicon as Sense Element for use in Flexible Tactile Sensors by Verma, Vartika, Ahmed, Eslam, Kovac, Nicola, Landesberger, Christof, Gieser, Horst, Brederlow, Ralf

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  6. 6
    Verification of physical designs using an integrated reverse engineering flow for nanoscale technologies

    Verification of physical designs using an integrated reverse engineering flow for nanoscale technologies by Lippmann, Bernhard, Unverricht, Niklas, Singla, Aayush, Ludwig, Matthias, Werner, Michael, Egger, Peter, Duebotzky, Anja, Graeb, Helmut, Gieser, Horst, Rasche, Martin, Kellermann, Oliver

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  7. 7
    Physical and Functional Reverse Engineering Challenges for Advanced Semiconductor Solutions

    Physical and Functional Reverse Engineering Challenges for Advanced Semiconductor Solutions by Lippmann, Bernhard, Bette, Ann-Christin, Ludwig, Matthias, Mutter, Johannes, Baehr, Johanna, Hepp, Alexander, Gieser, Horst, Kovac, Nicola, Zweifel, Tobias, Rasche, Martin, Kellermann, Oliver

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  8. 8
    ESD performance evaluation of powered high-speed interfaces

    ESD performance evaluation of powered high-speed interfaces by Koch, Sebastian, Gossner, Harald, Gieser, Horst, Maurer, Linus

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  9. 9
    Investigating the CDM susceptibility of IC’s at package and wafer level by capacitive coupled TLP

    Investigating the CDM susceptibility of IC’s at package and wafer level by capacitive coupled TLP by Wolf, Heinrich, Gieser, Horst, Walter, Dirk

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  10. 10
    Secondary discharge - A potential risk during system level ESD testing

    Secondary discharge - A potential risk during system level ESD testing by Wolf, Heinrich, Gieser, Horst

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  11. 11
    ESD Susceptibility of Submicron Air Gaps

    ESD Susceptibility of Submicron Air Gaps by Wolf, Heinrich, Gieser, Horst, Bonfert, Detlef, Hauser, Markus

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  12. 12
    Capacitively coupled transmission line pulsing cc-TLP––a traceable and reproducible stress method in the CDM-domain

    Capacitively coupled transmission line pulsing cc-TLP––a traceable and reproducible stress method in the CDM-domain by Wolf, Heinrich, Gieser, Horst, Stadler, Wolfgang, Wilkening, Wolfgang

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  13. 13
    Investigating the CDM susceptibility of IC's at package and wafer level by capacitive coupled TLP : Electrostatic Discharge Reliability

    Investigating the CDM susceptibility of IC's at package and wafer level by capacitive coupled TLP : Electrostatic Discharge Reliability by WOLF, Heinrich, GIESER, Horst, WALTER, Dirk

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  14. 14
    A Dedicated TLP Set-Up to Investigate the ESD Robustness of RF Elements and Circuits

    A Dedicated TLP Set-Up to Investigate the ESD Robustness of RF Elements and Circuits by Wolf, Heinrich, Gieser, Horst, Soldner, Wolfgang, Goßner, Harald

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  15. 15
    Integrated Flow for Reverse Engineering of Nanoscale Technologies

    Integrated Flow for Reverse Engineering of Nanoscale Technologies by Lippmann, Bernhard, Werner, Michael, Unverricht, Niklas, Singla, Aayush, Egger, Peter, Dubotzky, Anja, Gieser, Horst, Rasche, Martin, Kellermann, Oliver, Graeb, Helmut

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  16. 16
    An adapted filament model for accurate modeling of printed coplanar lines with significant surface roughness and proximity effects

    An adapted filament model for accurate modeling of printed coplanar lines with significant surface roughness and proximity effects by Curran, Brian, Ndip, Ivan, Werner, Christian, Ruttkowski, Veronika, Maiwald, Marcus, Wolf, Heinrich, Zoellmer, Volker, Domann, Gerhard, Guttovski, Stephan, Gieser, Horst, Reichl, Herbert

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  17. 17
    Analyzing the switching behavior of ESD-protection transistors by very fast transmission line pulsing

    Analyzing the switching behavior of ESD-protection transistors by very fast transmission line pulsing by Wolf, Heinrich, Gieser, Horst, Wilkening, Wolfgang

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  18. 18
    Bipolar model extension for MOS transistors considering gate coupling effects in the HBM ESD domain

    Bipolar model extension for MOS transistors considering gate coupling effects in the HBM ESD domain by Wolf, Heinrich, Gieser, Horst, Stadler, Wolfgang

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  19. 19
    Transmission lines on flexible substrates with minimized dispersion and losses

    Transmission lines on flexible substrates with minimized dispersion and losses by Wolf, Heinrich, Gieser, Horst, Maurer, Linus

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  20. 20
    Transmission lines on flexible substrates with minimized dispersion and losses

    Transmission lines on flexible substrates with minimized dispersion and losses by Wolf, Heinrich, Gieser, Horst, Maurer, Linus

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