Search Results - Greskamp, Brian

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  1. 1
    VARIUS: A Model of Process Variation and Resulting Timing Errors for Microarchitects

    VARIUS: A Model of Process Variation and Resulting Timing Errors for Microarchitects by Sarangi, S.R., Greskamp, B., Teodorescu, R., Nakano, J., Tiwari, A., Torrellas, J.

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  2. 2
    Unifying on-chip and inter-node switching within the Anton 2 network

    Unifying on-chip and inter-node switching within the Anton 2 network by Towles, Brian, Grossman, J. P., Greskamp, Brian, Shaw, David E.

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  3. 3
    The Specialized High-Performance Network on Anton 3

    The Specialized High-Performance Network on Anton 3 by Shim, Keun Sup, Greskamp, Brian, Towles, Brian, Edwards, Bruce, Grossman, J.P., Shaw, David E.

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  4. 4
    Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking

    Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking by Greskamp, B., Torrellas, J.

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  5. 5
    EVAL: Utilizing processors with variation-induced timing errors

    EVAL: Utilizing processors with variation-induced timing errors by Sarangi, Smruti, Greskamp, Brian, Tiwari, Abhishek, Torrellas, Josep

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  6. 6
    The BubbleWrap many-core: popping cores for sequential acceleration

    The BubbleWrap many-core: popping cores for sequential acceleration by Karpuzcu, Ulya R., Greskamp, Brian, Torrellas, Josep

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  7. 7
    Blueshift: Designing processors for timing speculation from the ground up

    Blueshift: Designing processors for timing speculation from the ground up by Greskamp, B., Lu Wan, Karpuzcu, U.R., Cook, J.J., Torrellas, J., Deming Chen, Zilles, C.

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  8. 8
    Unifying on-chip and inter-node switching within the Anton 2 network

    Unifying on-chip and inter-node switching within the Anton 2 network by Towles, Brian, Grossman, J. P., Greskamp, Brian, Shaw, David E.

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  9. 9
    CADRE: Cycle-Accurate Deterministic Replay for Hardware Debugging

    CADRE: Cycle-Accurate Deterministic Replay for Hardware Debugging by Sarangi, S.R., Greskamp, B., Torrellas, J.

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  10. 10
    Threshold Voltage Variation Effects on Aging-Related Hard Failure Rates

    Threshold Voltage Variation Effects on Aging-Related Hard Failure Rates by Greskamp, Brian, Sarangi, Smruti R., Torrellas, Josep

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  11. 11
    LeadOut: Composing low-overhead frequency-enhancing techniques for single-thread performance in configurable multicores

    LeadOut: Composing low-overhead frequency-enhancing techniques for single-thread performance in configurable multicores by Greskamp, Brian, Karpuzcu, Ulya R, Torrellas, Josep

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  12. 12
    Online architectures: A theoretical formulation and experimental prototype

    Online architectures: A theoretical formulation and experimental prototype by Sass, Ron, Greskamp, Brian, Leonard, Brian, Young, Jeff, Beeravolu, Srinivas

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  13. 13
    Filtering, Reductions and Synchronization in the Anton 2 Network

    Filtering, Reductions and Synchronization in the Anton 2 Network by Grossman, J. P., Towles, Brian, Greskamp, Brian, Shaw, David E.

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  14. 14
    The Specialized High-Performance Network on Anton 3

    The Specialized High-Performance Network on Anton 3 by Shim, Keun Sup, Greskamp, Brian, Towles, Brian, Edwards, Bruce, Grossman, J P, Shaw, David E

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  15. 15
    The ΛNTON 3 ASIC: a Fire-Breathing Monster for Molecular Dynamics Simulations

    The ΛNTON 3 ASIC: a Fire-Breathing Monster for Molecular Dynamics Simulations by Adams, Peter J., Batson, Brannon, Bell, Alistair, Bhatt, Jhanvi, Butts, J. Adam, Correia, Timothy, Edwards, Bruce, Feldmann, Peter, Fenton, Christopher H., Forte, Anthony, Gagliardo, Joseph, Gill, Gennette, Gorlatova, Maria, Greskamp, Brian, Grossman, J.P., Hunt, Jeremy, Jackson, Bryan L., Kirk, Mollie M., Kuskin, Jeffrey S., Mader, Roy J., McGowen, Richard, McLaughlin, Adam, Moraes, Mark A., Nasr, Mohamed, Nociolo, Lawrence J., O'Donnell, Lief, Parker, Andrew, Peticolas, Jon L., Quan, Terry, Schwink, T. Carl, Shim, Keun Sup, Siddique, Naseer, Spengler, Jochen, Theobald, Michael, Towles, Brian, Vick, William, Wang, Stanley C., Wazlowski, Michael, Weingarten, Madeleine J., Williams, John M., E.Shaw, David

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  16. 16
    A Model for Timing Errors in Processors with Parameter Variation

    A Model for Timing Errors in Processors with Parameter Variation by Sarangi, S.R., Greskamp, B., Torrellas, J.

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  17. 17
    A virtual machine for merit-based runtime reconfiguration

    A virtual machine for merit-based runtime reconfiguration by Greskamp, B., Sass, R.

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  18. 18
    Estimating design time for system circuits

    Estimating design time for system circuits by Bazeghi, Cyrus, Mesa-Martinez, Francisco J., Greskamp, Brian, Torrellas, Josep, Renau, Jose

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