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A 40-ns/100-pF low power full-CMOS 256 K (32 K/spl times/8) SRAM
by
Gubbels, W.C.H.
,
Hartgring, C.D.
,
Salters, R.H.W.
,
Lammerts, J.A.M.
,
Tooher, M.J.
,
Hens, P.F.P.C.
,
Bustiaens, J.J.J.
,
Van Dijk, J.M.F.
,
Sprokel, M.A.
Published in
IEEE journal of solid-state circuits
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Ieee Journal Of Solid-State Circuits
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Circuits
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Cmos Process
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Cmos Technology
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Impedance
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Power Dissipation
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Transistors
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