Search Results - Guhilot, Hansraj

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  1. 1
    Time‐to‐digital converters—A comprehensive review

    Time‐to‐digital converters—A comprehensive review by Mattada, Mahantesh P., Guhilot, Hansraj

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  2. 2
    62.5 ps LSB resolution multiphase clock Time to Digital Converter (TDC) implemented on FPGA

    62.5 ps LSB resolution multiphase clock Time to Digital Converter (TDC) implemented on FPGA by Mattada, Mahantesh, Guhilot, Hansraj

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  3. 3
    Design and Implementation of a DDR2 SDRAM Controller for Audio Data on a Reconfigurable Platform

    Design and Implementation of a DDR2 SDRAM Controller for Audio Data on a Reconfigurable Platform by Tigadi, Arun, Guhilot, Hansraj

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  4. 4
    All nMOS 10-T AQRC for Monolithic Chlorophyll Fluorescence SPAD Sensor

    All nMOS 10-T AQRC for Monolithic Chlorophyll Fluorescence SPAD Sensor by Guhilot, H., Kamat, R. K.

    Published in IEEE sensors journal
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  5. 5
    Design and Analysis of Real Time Video Processing Based on DWT Architecture for Mobile Robots

    Design and Analysis of Real Time Video Processing Based on DWT Architecture for Mobile Robots by Naik, Pramod Kumar, Tigadi, Arun, Guhilot, Hansraj, Vyasaraj T.

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  6. 6
    A Monolithic Implementation of Active Inductor VLQC and Jitter Free Photon Current Detection for Bio-Luminescence SPAD Sensor

    A Monolithic Implementation of Active Inductor VLQC and Jitter Free Photon Current Detection for Bio-Luminescence SPAD Sensor by Guhilot, H., Kamat, R. K., Shinde, S. A.

    Published in IEEE sensors journal
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  7. 7
    FPGA Implementation of contactless position sensor using FSR (Force sensing Resistor)

    FPGA Implementation of contactless position sensor using FSR (Force sensing Resistor) by Praveen, Kalkundri, Guhilot, Hansraj

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  8. 8
    Contactless position sensing using piezoresistive pressure sensor

    Contactless position sensing using piezoresistive pressure sensor by Kavya, M. C., Guhilot, Hansraj

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  9. 9
    Novel stable sram for ultra low power deep submicron cache memories

    Novel stable sram for ultra low power deep submicron cache memories by Rajani, H. P., Guhilot, H., Kulkanri, S. Y.

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  10. 10
    Area efficient time to digital converter (TDC) architecture with double ring-oscillator technique on FPGA for fluorescence measurement application

    Area efficient time to digital converter (TDC) architecture with double ring-oscillator technique on FPGA for fluorescence measurement application by Mattad, M. P., Guhilot, H., Kamat, R. K.

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  11. 11
    A CMOS VLSI implementation of Mean Life Time (MLT) Detector for Bio-luminescence Sensor

    A CMOS VLSI implementation of Mean Life Time (MLT) Detector for Bio-luminescence Sensor by Guhilot, Hansraj, Kamat, R K

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