Search Results - Hersemeule, R.

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  1. 1
    Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures

    Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures by Coste, N., Hermanns, H., Thonnart, Y., Garavel, H., Hersemeule, R., Zidouni, M.

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  2. 2
    Fast prototyping: a system design flow for fast design, prototyping and efficient IP reuse

    Fast prototyping: a system design flow for fast design, prototyping and efficient IP reuse by Pogodalla, Francois, Hersemeule, Richard, Coulomb, Pierre

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  3. 3
    Analytical computation of packet latency in a 2D-mesh NoC

    Analytical computation of packet latency in a 2D-mesh NoC by Foroutan, S., Thonnart, Y., Hersemeule, R., Jerraya, A.

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    LOTOS code generation for model checking of STBus based SoC: the STBus interconnection

    LOTOS code generation for model checking of STBus based SoC: the STBus interconnection by Wodey, P., Camarroque, G., Baray, F., Hersemeule, R., Cousin, J.-P.

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  5. 5
    Fast prototyping: a system design flow applied to a complex System-On-Chip multiprocessor design

    Fast prototyping: a system design flow applied to a complex System-On-Chip multiprocessor design by Clement, B., Hersemeule, R., Lantreibecq, E., Ramanadin, B., Coulomb, P., Pogodalla, F.

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  6. 6
    Description and benefits of dynamic collimation in digital breast tomosynthesis

    Description and benefits of dynamic collimation in digital breast tomosynthesis by Popova, Y, Hersemeule, G, Klausz, R, Souchay, H

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