A simulation methodology for superconducting qubit readout fidelity by Wong, Hiu Yung, Dhillon, Prabjot, Beck, Kristin M., Rosen, Yaniv J.

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Study of using Quantum Computer to Solve Poisson Equation in Gate Insulators by Morrell, Hector Jose, Wong, Hiu Yung

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TCAD Framework for HCD Kinetics in Low V D Devices Spanning Full V G /V D Space by Sharma, Uma, Duan, Meng, Diwakar, Himanshu, Thakor, Karansingh, Wong, Hiu Yung, Motzny, Steve, Dolgos, Denis, Mahapatra, Souvik

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Implanted Guard Ring Edge Termination With Avalanche Capability for Vertical GaN Devices by Wang, Yifan, Porter, Matthew, Xiao, Ming, Lu, Albert, Yee, Nathan, Kravchenko, Ivan, Srijanto, Bernadeta, Cheng, Kai, Wong, Hiu Yung, Zhang, Yuhao

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Study of Vertical Ga 2 O 3 FinFET Short Circuit Ruggedness using Robust TCAD Simulation by Lu, Albert, Elwailly, Adam, Zhang, Yuhao, Wong, Hiu Yung

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Implanted Guard Ring Edge Termination With Avalanche Capability for Vertical GaN Devices by Wang, Yifan, Porter, Matthew, Xiao, Ming, Lu, Albert, Yee, Nathan, Kravchenko, Ivan, Srijanto, Bernadeta, Cheng, Kai, Wong, Hiu Yung, Zhang, Yuhao

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A 3-D TCAD Framework for NBTI, Part-II: Impact of Mechanical Strain, Quantum Effects, and FinFET Dimension Scaling by Tiwari, Ravi, Parihar, Narendra, Thakor, Karansingh, Wong, Hiu Yung, Motzny, Steve, Choi, Munkang, Moroz, Victor, Mahapatra, Souvik

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Enhancement-Mode Recessed Gate and Cascode Gate Junctionless Nanowire With Low-Leakage and High-Drive Current by Wong, Hiu Yung, Braga, Nelson, Mickevicius, R. V.

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TCAD Framework for HCD Kinetics in Low VD Devices Spanning Full VG/VD Space by Sharma, Uma, Duan, Meng, Diwakar, Himanshu, Thakor, Karansingh, Wong, Hiu Yung, Motzny, Steve, Dolgos, Denis, Mahapatra, Souvik

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Thermal performance of diamond field-effect transistors by Lundh, James Spencer, Shoemaker, Daniel, Birdwell, A. Glen, Weil, James D., De La Cruz, Leonard M., Shah, Pankaj B., Crawford, Kevin G., Ivanov, Tony G., Wong, Hiu Yung, Choi, Sukwon

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Prediction of highly scaled hydrogen-terminated diamond MISFET performance based on calibrated TCAD simulation by Wong, Hiu Yung, Braga, Nelson, Mickevicius, R.V.

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Rapid Inverse Design of GaN-on-GaN Diode with Guard Ring Termination for BV and (VFQ)−1 Co-Optimization by Yee, Nathan, Lu, Albert, Wang, Yifan, Porter, Matthew, Zhang, Yuhao, Wong, Hiu Yung

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(Invited) Modeling Extended Defects in Semiconductor Devices by Moroz, Victor, Wong, Hiu Yung, Choi, Munkang

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Printing of electromagnetic interference shielding materials by Doshi, Pranay, Wong, Hiu Yung, Gutierrez, Daniel H, Lopez, Arlene, Nordlund, Dennis, Gandhiraman, Ram P

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Fabrication and Analysis of a Novel High Voltage Heterojunction p-NiO/n-Ga2 O3 Diode by Shimbori, Atsushi, Wong, Hiu Yung, Huang, Alex Q.

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The Impact of Defects on GaN Device Behavior: Modeling Dislocations, Traps, and Pits by Moroz, Victor, Wong, Hiu Yung, Choi, Munkang, Braga, Nelson, Mickevicius, R. V., Zhang, Yuhao, Palacios, Thomas

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TCAD Modeling of Cryogenic nMOSFET ON-State Current and Subthreshold Slope by Dhillon, Prabjot, Dao, Nguyen Cong, Leong, Philip H. W., Wong, Hiu Yung

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Using Long Short-Term Memory (LSTM) Network to Predict Negative-Bias Temperature Instability by Arefaine, Fanus, Duan, Meng, Tiwari, Ravi, Kapoor, Aadit, Smith, Lee, Mahapatra, Souvik, Wong, Hiu Yung

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Fully Analog ReRAM Neuromorphic Circuit Optimization using DTCO Simulation Framework by Nguyen, Anh, Nguyen, Hoi, Venimadhavan, Sruthi, Venkattraman, Ayyaswamy, Parent, David, Wong, Hiu Yung

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RFSOI n-MOSFET OI-Layer Ground-Plane Engineering with Quasi-3D Simulations by Connelly, Daniel, Wong, Hiu Yung, Burton, Richard, Takeuchi, Hideki, Mears, Robert

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