An efficient lid design for cooling stacked flip-chip 3D packages by Sikka, K., Wakil, J., Toy, H., Hsichang Liu

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An enhanced thermo-compression bonding process to address warpage in 3D integration of large die on organic substrates by Sakuma, Katsuyuki, Tunga, Krishna, Webb, Buck, Ramachandran, Koushik, Interrante, Marcus, Hsichang Liu, Angyal, Matthew, Berger, Daniel, Knickerbocker, John, Iyer, Subramanian

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Development of a Low CTE chip scale package by Yamada, Tomoyuki, Fukui, Masahiro, Terada, Kenji, Harazono, Masaaki, Reynolds, Charles, Audet, Jean, Iruvanti, Sushumna, Hsichang Liu, Moore, Scott, Yi Pan, Hongqing Zhang

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Bonding technologies for chip level and wafer level 3D integration by Sakuma, Katsuyuki, Skordas, Spyridon, Zitz, Jeffrey, Perfecto, Eric, Guthrie, William, Guerin, Luc, Langlois, Richard, Liu, Hsichang, Ramachandran, Koushik, Lin, Wei, Winstel, Kevin, Kohara, Sayuri, Sueoka, Kuniaki, Angyal, Matthew, Graves-Abe, Troy, Berger, Daniel, Knickerbocker, John, Iyer, Subramanian

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Multi-chip package thermal management of IBM z-server systems by Kamal Sikka, Edwards, D., Coico, P., Goldmann, L., Arvelo, A., Messina, G., Iruvanti, S., Pompeo, F., Werner, R., Humenik, J., Scheider, D., Jaspal, J., Tai, A., Campbell, B., Piasecki, C., Singh, S., DeHaven, P., Chace, M., Graziano, J., Hsichang Liu

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Efficient modeling methodology and hardware validation of glass-ceramic based wiring for high-performance single- and multi-chip modules by Sungjun Chun, Haridass, A., Deutsch, A., Rubin, B., Surovic, C., Klink, E., O'Connor, D., Hsichang Liu, Spring, C., Winkel, T.-M., Dyckman, W., Katopis, G., Kopcsay, G.

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Delamination mechanisms of thermal interface materials in organic packages during reflow and moisture soaking by Jiantao Zheng, Jadhav, V., Wakil, J., Coffin, J., Iruvanti, S., Langlois, R., Yarmchuk, E., Gaynes, M., Liu, H., Sikka, K., Brofman, P.

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