Search Results - Ichinomiya, Yoshihiro

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  1. 1
    Improving the Robustness of a Softcore Processor against SEUs by Using TMR and Partial Reconfiguration

    Improving the Robustness of a Softcore Processor against SEUs by Using TMR and Partial Reconfiguration by Ichinomiya, Yoshihiro, Tanoue, Shiro, Amagasaki, Motoki, Iida, Masahiro, Kuga, Morihiro, Sueyoshi, Toshinori

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  2. 2
    A Novel Soft Error Detection and Correction Circuit for Embedded Reconfigurable Systems

    A Novel Soft Error Detection and Correction Circuit for Embedded Reconfigurable Systems by Qian Zhao, Ichinomiya, Y., Amagasaki, M., Iida, M., Sueyoshi, T.

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  3. 3
    COGRE: A Configuration Memory Reduced Reconfigurable Logic Cell Architecture for Area Minimization

    COGRE: A Configuration Memory Reduced Reconfigurable Logic Cell Architecture for Area Minimization by Okamoto, Y, Ichinomiya, Y, Amagasaki, M, Iida, M, Sueyoshi, T

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  4. 4
    Designing Flexible Reconfigurable Regions to Relocate Partial Bitstreams

    Designing Flexible Reconfigurable Regions to Relocate Partial Bitstreams by Ichinomiya, Y., Usagawa, S., Amagasaki, M., Iida, M., Kuga, M., Sueyoshi, T.

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  5. 5
    A novel states recovery technique for the TMR softcore processor

    A novel states recovery technique for the TMR softcore processor by Tanoue, S., Ishida, T., Ichinomiya, Y., Amagasaki, M., Kuga, M., Sueyoshi, T.

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  6. 6
    Accelerated evaluation of SEU failure-in-time using frame-based partial reconfiguration

    Accelerated evaluation of SEU failure-in-time using frame-based partial reconfiguration by Ichinomiya, Y., Takano, K., Amagasaki, M., Kuga, M., Iida, M., Sueyoshi, T.

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  7. 7
    A robust reconfigurable logic device based on less configuration memory logic cell

    A robust reconfigurable logic device based on less configuration memory logic cell by Qian Zhao, Ichinomiya, Yoshihiro, Okamoto, Yasuhiro, Amagasaki, Motoki, Iida, Masahiro, Sueyoshi, Toshinori

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  8. 8
    A less configuration memory reconfigurable logic device with error detect and correct circuit

    A less configuration memory reconfigurable logic device with error detect and correct circuit by Qian Zhao, Ichinomiya, Y, Okamoto, Y, Amagasaki, M, Iida, M, Sueyoshi, T

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  9. 9
    Phosphor depreciation by ion bombardment

    Phosphor depreciation by ion bombardment by TADA, O, TOMINAKA, K, KONDO, T, KONDO, Y, ICHINOMIYA, K

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