Search Results - Ingerly, Doug

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  1. 1
    Silicon Reliability Characterization of Intel's Foveros 3D Integration Technology for Logic-on-Logic Die Stacking

    Silicon Reliability Characterization of Intel's Foveros 3D Integration Technology for Logic-on-Logic Die Stacking by Prasad, Chetan, Chugh, Sunny, Greve, Hannes, Ho, I-chen, Kabir, Enamul, Lin, Cheyun, Maksud, Mahjabin, Novak, Steven R., Orr, Benjamin, Park, Keun Woo, Schmitz, Anthony, Zhang, Zhizheng, Bai, Peng, Ingerly, Doug B., Armagan, Emre, Wu, Hsinwei, Stover, Patrick, Hibbeler, Lance, O'Day, Michael, Pantuso, Daniel

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    8.1 Lakefield and Mobility Compute: A 3D Stacked 10nm and 22FFL Hybrid Processor System in 12×12mm2, 1mm Package-on-Package

    8.1 Lakefield and Mobility Compute: A 3D Stacked 10nm and 22FFL Hybrid Processor System in 12×12mm2, 1mm Package-on-Package by Gomes, Wilfred, Khushu, Sanjeev, Ingerly, Doug B., Stover, Patrick N., Chowdhury, Nasirul I., O'Mahony, Frank, Balankutty, Ajay, Dolev, Noam, Dixon, Martin G., Jiang, Lei, Prekke, Surya, Patra, Biswajit, Rott, Pavel V., Kumar, Rajesh

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    Ponte Vecchio: A Multi-Tile 3D Stacked Processor for Exascale Computing

    Ponte Vecchio: A Multi-Tile 3D Stacked Processor for Exascale Computing by Gomes, Wilfred, Koker, Altug, Stover, Pat, Ingerly, Doug, Siers, Scott, Venkataraman, Srikrishnan, Pelto, Chris, Shah, Tejas, Rao, Amreesh, O'Mahony, Frank, Karl, Eric, Cheney, Lance, Rajwani, Iqbal, Jain, Hemant, Cortez, Ryan, Chandrasekhar, Arun, Kanthi, Basavaraj, Koduri, Raja

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