Search Results - Jerke, Göran

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  1. 1
    The Need and Opportunities of Electromigration-Aware Integrated Circuit Design

    The Need and Opportunities of Electromigration-Aware Integrated Circuit Design by Bigalke, Steve, Lienig, Jens, Jerke, Goran, Scheible, Jurgen, Jancke, Roland

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  2. 2
    Hierarchical propagation of geometric constraints for full-custom physical design of ICs

    Hierarchical propagation of geometric constraints for full-custom physical design of ICs by Mittag, Maximilian, Krinke, Andreas, Jerke, Göran, Rosenstiel, Wolfgang

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  3. 3
    Hierarchical current-density verification in arbitrarily shaped metallization patterns of analog circuits

    Hierarchical current-density verification in arbitrarily shaped metallization patterns of analog circuits by Jerke, G., Lienig, J.

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  4. 4
    Hierarchical propagation of geometric constraints for full-custom physical design of ICs

    Hierarchical propagation of geometric constraints for full-custom physical design of ICs by Mittag, M., Krinke, A., Jerke, G., Rosenstiel, W.

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  5. 5
    Reliability-driven layout decompaction for electromigration failure avoidance in complex mixed-signal IC designs

    Reliability-driven layout decompaction for electromigration failure avoidance in complex mixed-signal IC designs by Jerke, Göran, Lienig, Jens, Scheible, Jürgen

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  6. 6
    On the Verification of High-Order Constraint Compliance in IC Design

    On the Verification of High-Order Constraint Compliance in IC Design by Freuer, J., Jerke, G., Gerlach, J., Nebel, W.

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  7. 7
    Early-stage determination of current-density criticality in interconnects

    Early-stage determination of current-density criticality in interconnects by Jerke, Goran, Lienig, Jens

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  8. 8
    Hierarchical current density verification for electromigration analysis in arbitrarily shaped metallization patterns of analog circuits

    Hierarchical current density verification for electromigration analysis in arbitrarily shaped metallization patterns of analog circuits by Jerke, G., Lienig, J.

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  9. 9
    A new methodology for constraint-driven layout design of analog circuits

    A new methodology for constraint-driven layout design of analog circuits by Nassaj, A., Lienig, J., Jerke, G.

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  10. 10
    Current-driven wire planning for electromigration avoidance in analog circuits

    Current-driven wire planning for electromigration avoidance in analog circuits by Lienig, Jens, Jerke, Göran

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  11. 11
    A constraint-driven methodology for placement of analog and mixed-signal integrated circuits

    A constraint-driven methodology for placement of analog and mixed-signal integrated circuits by Nassaj, A., Lienig, J., Jerke, G.

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  12. 12
    On the verification of high-order constraint compliance in IC design

    On the verification of high-order constraint compliance in IC design by Freuer, Jan, Jerke, Göran, Gerlach, Joachim, Nebel, Wolfgang

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  13. 13
    Physical verification flow for hierarchical analog ic design constraints

    Physical verification flow for hierarchical analog ic design constraints by Meyer zu Bexten, Volker, Tristl, Markus, Jerke, Goran, Marquardt, Hartmut, Medhat, Dina

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  14. 14
    AnalogRouter: a new approach of current-driven routing for analog circuits

    AnalogRouter: a new approach of current-driven routing for analog circuits by Lienig, J., Jerke, G., Adler, T.

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  15. 15
    Current-Density-Aware for Automotive IC-Design

    Current-Density-Aware for Automotive IC-Design by Jerke, Goran, Henning, Manfred, Stephan, Ralf-eckhard

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