Search Results - KIM, Jeong-Kyoum

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  1. 1
    A 20-GHZ phase-locked loop for 40-Gb/s serializing transmitter in 0.13-μm CMOS

    A 20-GHZ phase-locked loop for 40-Gb/s serializing transmitter in 0.13-μm CMOS by KIM, Jaeha, KIM, Jeong-Kyoum, LEE, Bong-Joon, KIM, Namhoon, JEONG, Deog-Kyoon, KIM, Wonchan

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  2. 2
    Low-voltage high-performance silicon photonic devices and photonic integrated circuits operating up to 30 Gb/s

    Low-voltage high-performance silicon photonic devices and photonic integrated circuits operating up to 30 Gb/s by Kim, Gyungock, Park, Jeong Woo, Kim, In Gyoo, Kim, Sanghoon, Kim, Sanggi, Lee, Jong Moo, Park, Gun Sik, Joo, Jiho, Jang, Ki-Seok, Oh, Jin Hyuk, Kim, Sun Ae, Kim, Jong Hoon, Lee, Jun Young, Park, Jong Moon, Kim, Do-Won, Jeong, Deog-Kyoon, Hwang, Moon-Sang, Kim, Jeong-Kyoum, Park, Kyu-Sang, Chi, Han-Kyu, Kim, Hyun-Chang, Kim, Dong-Wook, Cho, Mu Hee

    Published in Optics express
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  3. 3
    A Fully Integrated 0.13-μm CMOS 40-Gb/s Serial Link Transceiver

    A Fully Integrated 0.13-μm CMOS 40-Gb/s Serial Link Transceiver by KIM, Jeong-Kyoum, KIM, Jaeha, GYUDONG KIM, JEONG, Deog-Kyoon

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  4. 4
    Bulk-Si photonics technology for DRAM interface [Invited]

    Bulk-Si photonics technology for DRAM interface [Invited] by Byun, Hyunil, Bok, Jinkwon, Cho, Kwansik, Cho, Keunyeong, Choi, Hanmei, Choi, Jinyong, Choi, Sanghun, Han, Sangdeuk, Hong, Seokyong, Hyun, Seokhun, Jeong, T. J., Ji, Ho-Chul, Joe, In-Sung, Kim, Beomseok, Kim, Donghyun, Kim, Junghye, Kim, Jeong-Kyoum, Kim, Kiho, Kim, Seong-Gu, Kong, Duanhua, Kuh, Bongjin, Kwon, Hyuckjoon, Lee, Beomsuk, Lee, Hocheol, Lee, Kwanghyun, Lee, Shinyoung, Nam, Jeongsik, Nejadmalayeri, Amir, Park, Yongsang, Parmar, Sunil, Pyo, Junghyung, Shin, Dongjae, Shin, Joonghan, Shin, Yong-hwack, Suh, Sung-Dong, Yoon, Honggoo, Park, Yoondong, Choi, Junghwan, Ha, Kyoung-Ho, Jeong, Gitae

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  5. 5
    A 180-Mb/s to 3.2-Gb/s, continuous-rate, fast-locking CDR without using external reference clock

    A 180-Mb/s to 3.2-Gb/s, continuous-rate, fast-locking CDR without using external reference clock by Moon-Sang Hwang, Sang-Yoon Lee, Jeong-Kyoum Kim, Suhwan Kim, Deog-Kyoon Jeong

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  6. 6
    A 40-Gb/s transceiver in 0.13-μm CMOS technology

    A 40-Gb/s transceiver in 0.13-μm CMOS technology by Jeong-Kyoum Kim, Jaeha Kim, Gyudong Kim, Hankyu Chi, Deog-Kyoon Jeong

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  7. 7
    A 26.5-37.5 GHz frequency divider and a 73-GHz-BW CML buffer in 0.13μm CMOS

    A 26.5-37.5 GHz frequency divider and a 73-GHz-BW CML buffer in 0.13μm CMOS by Jeong-Kyoum Kim, Jaeha Kim, Sang-Yoon Lee, Suhwan Kim, Deog-Kyoon Jeong

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  8. 8
    A Fully Integrated 0.13-[Formula Omitted]m CMOS 40-Gb/s Serial Link Transceiver

    A Fully Integrated 0.13-[Formula Omitted]m CMOS 40-Gb/s Serial Link Transceiver by Kim, Jeong-Kyoum, Kim, Jaeha, Kim, Gyudong, Jeong, Deog-Kyoon

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  9. 9
    FPGA-based DDR3 DRAM interface using bulk-Si optical interconnects

    FPGA-based DDR3 DRAM interface using bulk-Si optical interconnects by Hyunil Byun, In-sung Joe, Sunjoong Kim, Kwanghyun Lee, Seokyong Hong, Hochul Ji, Junghyung Pyo, Kwansik Cho, Seong-gu Kim, Sungdong Suh, Yong-hwack Shin, Sanghoon Choi, Junghye Kim, Sangdeok Han, Beomseok Lee, Kyoungwon Na, Dongjae Shin, Kyoungho Ha, Yoondong Park, Kiho Kim, Jinyong Choi, Taejin Jeong, Seokhun Hyun, Jeong-kyoum Kim, Hong-gu Yoon, Jeongsik Nam, Hyukjoon Kwon, Hocheol Lee, Jung-Hwan Choi, Joosun Choi, Chilhee Chung

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  10. 10
    Design Optimization of On-Chip Inductive Peaking Structures for 0.13- mu hbox m CMOS 40-Gb/s Transmitter Circuits

    Design Optimization of On-Chip Inductive Peaking Structures for 0.13- mu hbox m CMOS 40-Gb/s Transmitter Circuits by Kim, Jaeha, Kim, Jeong-Kyoum, Lee, Bong-Joon, Jeong, Deog-Kyoon

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  11. 11
    Design Optimization of On-Chip Inductive Peaking Structures for 0.13- \mu} CMOS 40-Gb/s Transmitter Circuits

    Design Optimization of On-Chip Inductive Peaking Structures for 0.13- \mu} CMOS 40-Gb/s Transmitter Circuits by Jaeha Kim, Jeong-Kyoum Kim, Bong-Joon Lee, Deog-Kyoon Jeong

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  12. 12
    A Fully Integrated 0.13- \mum CMOS 40-Gb/s Serial Link Transceiver

    A Fully Integrated 0.13- \mum CMOS 40-Gb/s Serial Link Transceiver by Kim, J.-K., Kim, J, Kim, G, Jeong, D.-K.

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  13. 13
    A 20-GHz phase-locked loop for 40-gb/s serializing transmitter in 0.13-[micro]m CMOS

    A 20-GHz phase-locked loop for 40-gb/s serializing transmitter in 0.13-[micro]m CMOS by Kim, Jaeha, Kim, Jeong-Kyoum, Lee, Bong-Joon, Kim, Namhoon, Jeong, Deog-Kyoon, Kim, W

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  14. 14
    A 20-GHz phase-locked loop for 40-gb/s serializing transmitter in 0.13-mum CMOS

    A 20-GHz phase-locked loop for 40-gb/s serializing transmitter in 0.13-mum CMOS by Kim, Jaeha, Jeong-Kyoum, Kim, Lee, Bong-Joon, Kim, Namhoon, Jeong, Deog-Kyoon, Kim, W

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  15. 15
    A 20-GHz phase-locked loop for 40-gb/s serializing transmitter in 0.13-/spl mu/m CMOS

    A 20-GHz phase-locked loop for 40-gb/s serializing transmitter in 0.13-/spl mu/m CMOS by Jaeha Kim, Jeong-Kyoum Kim, Bong-Joon Lee, Namhoon Kim, Deog-Kyoon Jeong, Kim, W.

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  16. 16
    Circuit techniques for a 40Gb/s transmitter in 0.13/spl mu/m CMOS

    Circuit techniques for a 40Gb/s transmitter in 0.13/spl mu/m CMOS by Jaeha Kim, Jeong-Kyoum Kim, Bong-Joon Lee, Moon-Sang Hwang, Hyung-Rok Lee, Sang-Hyun Lee, Namhoon Kim, Deog-Kyoon Jeong, Wonchan Kim

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  17. 17
    A Heterogeneous Dual DLL and Quantization error minimized ZQ calibration for 30nm 1.2V 4Gb 3.2Gb/s/pin DDR4 SDRAM

    A Heterogeneous Dual DLL and Quantization error minimized ZQ calibration for 30nm 1.2V 4Gb 3.2Gb/s/pin DDR4 SDRAM by Taesik Na, Yong Shim, Indal Song, Jeong-Kyoum Kim, Seokhun Hyun, Jun-Bae Kim, Jung-Hwan Choi, Chi-Wook Kim, Jung-Bae Lee, Joo Sun Choi

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  18. 18
    A 20-Gb/s full-rate 27-1 PRBS generator integrated with 20-GHz PLL in 0.13-μm CMOS

    A 20-Gb/s full-rate 27-1 PRBS generator integrated with 20-GHz PLL in 0.13-μm CMOS by Jeong-Kyoum Kim, Jaeha Kim, Deog-Kyoon Jeong

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  19. 19
    A 20-GHz phase-locked loop for 40Gb/s serializing transmitter in 0.13/spl mu/m CMOS

    A 20-GHz phase-locked loop for 40Gb/s serializing transmitter in 0.13/spl mu/m CMOS by Jaeha Kim, Jeong-Kyoum Kim, Bong-Joon Lee, Namhoon Kim, Deog-Kyoon Jeong, Wonchan Kim

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