Search Results - KRAUTER, Byron L

  • Showing 1 - 16 results of 16
Refine Results
  1. 1
    Realizable driving point model for on-chip interconnect with inductance

    Realizable driving point model for on-chip interconnect with inductance by Kashyap, Chandramouli V, Krauter, Byron L

    Get full text
    Conference Proceeding
    Save to List
    Saved in:
  2. 2
    When are transmission-line effects important for on-chip interconnections?

    When are transmission-line effects important for on-chip interconnections? by Deutsch, A., Kopcsay, G.V., Restle, P.J., Smith, H.H., Katopis, G., Becker, W.D., Coteus, P.W., Surovic, C.W., Rubin, B.J., Dunne, R.P., Gallo, T., Jenkins, K.A., Terman, L.M., Dennard, R.H., Sai-Halasz, G.A., Krauter, B.L., Knebel, D.R.

    Get full text
    Items that this one cites
    Items that cite this one
    Article
    Save to List
    Saved in:
  3. 3
    The clock distribution of the POWER4 microprocessor

    The clock distribution of the POWER4 microprocessor by Restle, P.J., Carter, C.A., Eckhardt, J.P., Krauter, B.L., McCredie, B.D., Jenkins, K.A., Weger, A.J., Mule, A.V.

    Request full text
    Article
    Save to List
    Saved in:
  4. 4
    The circuit and physical design of the POWER4 microprocessor

    The circuit and physical design of the POWER4 microprocessor by Warnock, J. D., Keaty, J. M., Petrovick, J., Clabes, J. G., Kircher, C. J., Krauter, B. L., Restle, P. J., Zoric, B. A., Anderson, C. J.

    Get full text
    Items that cite this one
    Article
    Save to List
    Saved in:
  5. 5
    New methodology for combined Simulation of delta-I noise interaction with interconnect noise for wide, on-chip data-buses using lossy transmission-line power-blocks

    New methodology for combined Simulation of delta-I noise interaction with interconnect noise for wide, on-chip data-buses using lossy transmission-line power-blocks by Deutsch, A., Smith, H.H., Rubin, B.J., Krauter, B.L., Kopcsay, G.V.

    Get full text
    Items that this one cites
    Items that cite this one
    Article
    Save to List
    Saved in:
  6. 6
    On-chip wiring design challenges for Gigahertz operation: Interconnections-Addressing the Next Challenge of IC Technology. Part I: Integration and Packaging Trends

    On-chip wiring design challenges for Gigahertz operation: Interconnections-Addressing the Next Challenge of IC Technology. Part I: Integration and Packaging Trends by DEUTSCH, Alina, COTEUS, Paul W, KOPCSAY, Gerard V, SMITH, Howard H, SUROVIC, Christopher W, KRAUTER, Byron L, EDELSTEIN, Daniel C, RESTLE, Phillip J

    Get full text
    Article
    Save to List
    Saved in:
  7. 7
    Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance

    Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance by Chowdhury, M.H., Ismail, Y.I., Kashyap, C.V., Krauter, B.L.

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  8. 8
    Model order reduction and variational techniques for parasitic analysis

    Model order reduction and variational techniques for parasitic analysis by Byron L Krauter, Jandhyala, Vikram, Daniel, Luca

    Get full text
    Conference Proceeding
    Save to List
    Saved in:
  9. 9
    Understanding common-mode noise on wide data-buses

    Understanding common-mode noise on wide data-buses by Deutsch, A., Smith, H.H., Kopcsay, G.V., Krauter, B.L., Surovic, C.W., Elfadel, A., Widiger, D.J.

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  10. 10
    Equipotential shells for efficient inductance extraction

    Equipotential shells for efficient inductance extraction by Beattie, M., Krauter, B., Alatan, L., Pileggi, L.

    Get full text
    Items that this one cites
    Items that cite this one
    Article
    Save to List
    Saved in:
  11. 11
    Window-based susceptance models for large-scale RLC circuit analyses

    Window-based susceptance models for large-scale RLC circuit analyses by Hui Zheng, Krauter, B., Beattie, M., Pileggi, L.

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  12. 12
    Transmission line synthesis via constrained multivariable optimization

    Transmission line synthesis via constrained multivariable optimization by Gupta, R., Krauter, B., Pileggi, L.T.

    Get full text
    Items that this one cites
    Items that cite this one
    Article
    Save to List
    Saved in:
  13. 13
    A sparse image method for BEM capacitance extraction

    A sparse image method for BEM capacitance extraction by Krauter, B., Yu Xia, Dengi, A., Pileggi, L.T.

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  14. 14
    The Elmore Delay as a Bound for RC Trees with Generalized Input Signals

    The Elmore Delay as a Bound for RC Trees with Generalized Input Signals by Rohini Gupta

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  15. 15
    Transmission Line Synthesis

    Transmission Line Synthesis by Byron Krauter

    Request full text
    Conference Proceeding
    Save to List
    Saved in:
  16. 16
    Electrical modeling of integrated-package power and ground distributions

    Electrical modeling of integrated-package power and ground distributions by Zheng, H., Pileggi, L., Kratiter, B.

    Get full text
    Items that this one cites
    Items that cite this one
    Article
    Save to List
    Saved in:

Search Tools: