Search Results - Kalayappan, Rajshekar

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  1. 1
    A Survey of Cache Simulators

    A Survey of Cache Simulators by Brais, Hadi, Kalayappan, Rajshekar, Panda, Preeti Ranjan

    Published in ACM computing surveys
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  2. 2
    ChunkedTejas: A Chunking-based Approach to Parallelizing a Trace-Driven Architectural Simulator

    ChunkedTejas: A Chunking-based Approach to Parallelizing a Trace-Driven Architectural Simulator by Kalayappan, Rajshekar, Chhabra, Avantika, Sarangi, Smruti R.

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  3. 3
    A Formal Approach to Accountability in Heterogeneous Systems-on-Chip

    A Formal Approach to Accountability in Heterogeneous Systems-on-Chip by Kalayappan, Rajshekar, Sarangi, Smruti R.

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  4. 4
    Providing Accountability in Heterogeneous Systems-on-Chip

    Providing Accountability in Heterogeneous Systems-on-Chip by Kalayappan, Rajshekar, Sarangi, Smruti R.

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  5. 5
    SANNA: Secure Acceleration of Neural Network Applications

    SANNA: Secure Acceleration of Neural Network Applications by Poptani, Akash, Mittal, Abhishek, Saiya, Rishit, Kalayappan, Rajshekar, Chandran, Sandeep

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  6. 6
    A Survey of Checker Architectures

    A Survey of Checker Architectures by KALAYAPPAN, Rajshekar, SARANGI, Smruti R

    Published in ACM computing surveys
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  7. 7
    ParTejas: A Parallel Simulator for Multicore Processors

    ParTejas: A Parallel Simulator for Multicore Processors by Malhotra, Geetika, Kalayappan, Rajshekar, Goel, Seep, Aggarwal, Pooja, Sagar, Abhishek, Sarangi, Smruti R.

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  8. 8
    A hardware implementation of the MCAS synchronization primitive

    A hardware implementation of the MCAS synchronization primitive by Patel, Srishty, Kalayappan, Rajshekar, Mahajan, Ishani, Sarangi, Smruti R.

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  9. 9
    Surveillance using non-stealthy sensors: A new intruder model

    Surveillance using non-stealthy sensors: A new intruder model by Bagchi, Amitabha, Kalayappan, Rajshekar, Sankhla, Surabhi

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  10. 10
    FluidCheck: A Redundant Threading-Based Approach for Reliable Execution in Manycore Processors

    FluidCheck: A Redundant Threading-Based Approach for Reliable Execution in Manycore Processors by Kalayappan, Rajshekar, Sarangi, Smruti R.

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  11. 11
    Dynamic Ineffectuality-based Clustered Architectures

    Dynamic Ineffectuality-based Clustered Architectures by Kalayappan, Rajshekar, Chandran, Sandeep

    Published in arXiv.org
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  12. 12
    On Decomposing Complex Test Cases for Efficient Post-silicon Validation

    On Decomposing Complex Test Cases for Efficient Post-silicon Validation by Harshitha, C, Harikrishna, Sundarapalli, Rohith, Peddakotla, Chandran, Sandeep, Kalayappan, Rajshekar

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  13. 13
    SecCheck: A Trustworthy System with Untrusted Components

    SecCheck: A Trustworthy System with Untrusted Components by Kalayappan, Rajshekar, Sarangi, Smruti R.

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  14. 14
    SecX: A Framework for Collecting Runtime Statistics for SoCs with Multiple Accelerators

    SecX: A Framework for Collecting Runtime Statistics for SoCs with Multiple Accelerators by Kalayappan, Rajshekar, Sarangi, Smruti R.

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  15. 15
    Tejas Simulator : Validation against Hardware

    Tejas Simulator : Validation against Hardware by Sarangi, Smruti R, Kalayappan, Rajshekar, Kallurkar, Prathmesh, Goel, Seep

    Published in arXiv.org
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