Search Results - Kallepelli, Sagar

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  1. 1
    Exploring High-Temperature Reliability of 4H-SiC MOSFETs : A Comparative Study of High-K Gate Dielectric Materials

    Exploring High-Temperature Reliability of 4H-SiC MOSFETs : A Comparative Study of High-K Gate Dielectric Materials by M. V. Ganeswara Rao, N. Ramanjaneyulu, Sumalatha Madugula, N. P. Dharani, K. Rajesh Babu, Kallepelli Sagar

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  2. 2
    A novel circular double-gate SOI MOSFET with raised source/drain

    A novel circular double-gate SOI MOSFET with raised source/drain by Kallepelli, Sagar, Maheshwaram, Satish

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  3. 3
    Benchmarking and Optimization of Circular Double Gate Transistor (CDGT) for Sub 10 nm Nodes

    Benchmarking and Optimization of Circular Double Gate Transistor (CDGT) for Sub 10 nm Nodes by Sagar, Kallepelli, Maheshwaram, Satish

    Published in SILICON
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  4. 4
    A Novel Vertically Stacked Circular Nanosheet FET for High-Performance Applications

    A Novel Vertically Stacked Circular Nanosheet FET for High-Performance Applications by Kallepelli, Sagar, Maheshwaram, Satish

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  5. 5
    Performance Analysis of Sub 10 nm Double Gate Circular MOSFET

    Performance Analysis of Sub 10 nm Double Gate Circular MOSFET by Sagar, Kallepelli, Maheshwaram, Satish

    Published in SILICON
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  6. 6
    Performance analysis of geometric variations in circular double gate MOSFETs at sub-7nm technology nodes

    Performance analysis of geometric variations in circular double gate MOSFETs at sub-7nm technology nodes by Kallepelli, Sagar, Maheshwaram, Satish, Vadthiya, Narendar

    Published in Microelectronics
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  7. 7
    Spacer Engineered Halo-Doped Nanowire MOSFET for Digital Applications

    Spacer Engineered Halo-Doped Nanowire MOSFET for Digital Applications by Kumar, P. Kiran, Balaji, B., Vardhan, Ch. Sree, Gowthami, Y., Agarwal, Vipul, Shashidhar, M., Sagar, Kallepelli, Jena, Biswajit, Pedapudi, Michael Cholines, Manikanta, Kurivella

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  8. 8
    RETRACTED ARTICLE: Exploring High-Temperature Reliability of 4H-SiC MOSFETs: A Comparative Study of High-K Gate Dielectric Materials

    RETRACTED ARTICLE: Exploring High-Temperature Reliability of 4H-SiC MOSFETs: A Comparative Study of High-K Gate Dielectric Materials by Ganeswara Rao, M. V., Ramanjaneyulu, N., Madugula, Sumalatha, Dharani, N. P., Rajesh Babu, K., Sagar, Kallepelli

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  9. 9
    Retraction Note: Exploring High-Temperature Reliability of 4H-SiC MOSFETs: A Comparative Study of High-K Gate Dielectric Materials

    Retraction Note: Exploring High-Temperature Reliability of 4H-SiC MOSFETs: A Comparative Study of High-K Gate Dielectric Materials by Ganeswara Rao, M. V., Ramanjaneyulu, N., Madugula, Sumalatha, Dharani, N. P., Rajesh Babu, K., Sagar, Kallepelli

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  10. 10
    Optimization of Sidewall Spacer Engineering at Sub-5 nm Technology Node For JL-Nanowire FET: Digital/Analog/RF/Circuit Perspective

    Optimization of Sidewall Spacer Engineering at Sub-5 nm Technology Node For JL-Nanowire FET: Digital/Analog/RF/Circuit Perspective by Anguru, Chandana, Aryasomayajula, Vamsi Krishna, Kotha, Venkata Ramakrishna, Valasa, Sresta, Bhukya, Sunitha, Vadthiya, Narendar, Bheemudu, V., Kallepelli, Sagar, Maheshwaram, Satish, Mudidhe, Praveen Kumar

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