Analysis and Design of N-Path Filter Offset Tuning in a 0.7-2.7-GHz Receiver Front-End by Ostman, Kim B., Englund, Mikko, Viitala, Olli, Kaltiokallio, Mikko, Stadius, Kari, Koli, Kimmo, Ryynanen, Jussi

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Capacitive Coupling Element Antennas for Multi-Standard Mobile Handsets by Valkonen, R., Kaltiokallio, M., Icheln, C.

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A Robust Ultra-Low Voltage CPU Utilizing Timing-Error Prevention by Hiienkari, Markus, Teittinen, Jukka, Koskinen, Lauri, Turnquist, Matthew, Mäkipää, Jani, Rantala, Arto, Sopanen, Matti, Kaltiokallio, Mikko

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A Programmable 0.7-2.7 GHz Direct \Delta \Sigma Receiver in 40 nm CMOS by Englund, Mikko, Ostman, Kim B., Viitala, Olli, Kaltiokallio, Mikko, Stadius, Kari, Koli, Kimmo, Ryynanen, Jussi

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28.1 A programmable 0.7-to-2.7GHz direct ΔΣ receiver in 40nm CMOS by Englund, Mikko, Ostman, Kim B., Viitala, Olli, Kaltiokallio, Mikko, Stadius, Kari, Koli, Kimmo, Ryynänen, Jussi

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A 0.7-2.7-GHz Blocker-Tolerant Compact-Size Single-Antenna Receiver for Wideband Mobile Applications by Kaltiokallio, Mikko, Valkonen, Risto, Stadius, Kari, Ryynanen, Jussi

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A 2.5-GHz Receiver Front-End With Q-Boosted Post-LNA N-Path Filtering in 40-nm CMOS by Ostman, Kim B., Englund, Mikko, Viitala, Olli, Kaltiokallio, Mikko, Stadius, Kari, Koli, Kimmo, Ryynanen, Jussi

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A Programmable 0.7-2.7 GHz Direct [Formula Omitted] Receiver in 40 nm CMOS by Englund, Mikko, Ostman, Kim B, Viitala, Olli, Kaltiokallio, Mikko, Stadius, Kari, Koli, Kimmo, Ryynanen, Jussi

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Wideband 2 to 6 GHz RF Front-End With Blocker Filtering by Kaltiokallio, M., Saari, V., Kallioinen, S., Parssinen, A., Ryynanen, J.

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A 2.5-GHz Receiver Front-End With [Formula Omitted]-Boosted Post-LNA [Formula Omitted]-Path Filtering in 40-nm CMOS by Ostman, Kim B, Englund, Mikko, Viitala, Olli, Kaltiokallio, Mikko, Stadius, Kari, Koli, Kimmo, Ryynanen, Jussi

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A 0.8-3 GHz mixer-first receiver with on-chip transformer balun in 65-nm CMOS by Tikka, Tero, Stadius, Kari, Ryynanen, Jussi, Kaltiokallio, Mikko

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Design of Precise Gain GmC-leapfrog Filters by Kaltiokallio, Mikko, Lindfors, Saska, Saari, Ville, Ryynanen, Jussi

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A 240-MHz Low-Pass Filter With Variable Gain in 65-nm CMOS for a UWB Radio Receiver by Saari, V., Kaltiokallio, M., Lindfors, S., Ryynanen, J., Halonen, K.A.I.

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A 3.15pJ/cyc 32-bit RISC CPU with timing-error prevention and adaptive clocking in 28nm CMOS by Hiienkari, Markus, Teittinen, Jukka, Koskinen, Lauri, Turnquist, Matthew, Kaltiokallio, Mikko

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Analysis and design of common-gate low-noise amplifier for wideband applications by Kaukovuori, Jouni, Kaltiokallio, Mikko, Ryynänen, Jussi

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A 1 to 5GHz adjustable active polyphase filter for LO quadrature generation by Kaltiokallio, M., Ryynnen, J.

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Ultra-wide voltage range 32-bit RISC CPU with timing-error prevention in 28nm CMOS by Hiienkari, Markus, Teittinen, Jukka, Koskinen, Lauri, Turnquist, Matthew, Kaltiokallio, Mikko, Makipaa, Jani, Rantala, Arto, Sopanen, Matti

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A 2.5-GHz 4.2-dB NF direct ΔΣ receiver with a frequency-translating integrator by Englund, Mikko, Ostman, Kim B., Viitala, Olli, Kaltiokallio, Mikko, Stadius, Kari, Ryynanen, Jussi, Koli, Kimmo

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A 1.2V 240MHz CMOS Continuous-Time Low-Pass Filter for a UWB Radio Receiver by Saari, Ville, Kaltiokallio, Mikko, Lindfors, Saska, Ryynanen, Jussi, Halonen, Kari

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Active polyphase filter analysis by Kaltiokallio, M, Ryynänen, J, Lindfors, S

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