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Virtual Test Development Using Pre-Silicon Verification Environment
by
Aderholz, E.
,
Atol, Q.
,
Baptist, B.
,
Holzner, R.
,
Ignacio, R.
,
Kamanuri, V.
,
Kun, A.
,
Ma, K.
,
Mariacher, B.
,
Pfabigan, O.
,
Przybilla, A.
,
Samardzic, D.
,
Schlagbauer, F.
,
Schleicher, M.
,
Valiente, J.P.
,
Vargas, E.
,
Vinod, K.
,
Zikulnig, O.
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Electronics Industry
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Integrated Circuit Modeling
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Post-Silicon
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Production
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Radio Frequency
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Silicon
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Silicon Compounds
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Simulation
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Systemverilog
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